SEGMENTED MEMORY HAVING POWER-SAVING MODE

A memory array is divided into multiple segments, each segment having one or more rows of bitcells. Each segment has control circuitry that controls whether the segment is in an active mode or a power-saving, sleep mode. The control circuitry ensures that a segment transitions from sleep mode to act...

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Bibliographische Detailangaben

Hauptverfasser:	STEPHANI RICHARD J, GOEL ANKUR, PRIEBE GORDON W
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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