SHADER INTERFACES

Allocation of memory registers for shaders by a processor is described herein. For each shader, registers are allocated based on the shader's level of complexity. Simpler shader instances are restricted to a smaller number of memory registers. More complex shader instances are allotted more reg...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	RAPP JOHN L, LACEY MARK M, PEEPER CRAIG, ONEPPO MICHAEL V, BLISS ANDREW L
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS
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