SEMICONDUCTOR PACKAGE WITH SINGLE SIDED SUBSTRATE DESIGN AND MANUFACTURING METHODS THEREOF
A multilayer substrate includes a first outer conductive patterned layer, a first insulating layer exposing a portion of the first outer conductive patterned layer to define a first set of pads, a second outer conductive patterned layer, and a second insulating layer exposing a portion of the second...
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| creator | SU YUANANG CHEN CHIANG HUANG SHIH-FU LEE MING CHIANG CHEN TZU-HUI CHEN KUANG-HSIUNG HSIEH PAO-MING APPELT BERND KARL |
| description | A multilayer substrate includes a first outer conductive patterned layer, a first insulating layer exposing a portion of the first outer conductive patterned layer to define a first set of pads, a second outer conductive patterned layer, and a second insulating layer exposing a portion of the second outer conductive patterned layer to define a second set of pads. The multilayer substrate further includes inner layers each with an inner conductive patterned layer, multiple inner conductive posts formed adjacent to the inner conductive patterned layer, and an inner dielectric layer, where the inner conductive patterned layer and the inner conductive posts are embedded in the inner dielectric layer, and a top surface of each of the inner conductive posts is exposed from the inner dielectric layer. |
| format | Patent |
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The multilayer substrate further includes inner layers each with an inner conductive patterned layer, multiple inner conductive posts formed adjacent to the inner conductive patterned layer, and an inner dielectric layer, where the inner conductive patterned layer and the inner conductive posts are embedded in the inner dielectric layer, and a top surface of each of the inner conductive posts is exposed from the inner dielectric layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140123&DB=EPODOC&CC=US&NR=2014021636A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140123&DB=EPODOC&CC=US&NR=2014021636A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SU YUANANG</creatorcontrib><creatorcontrib>CHEN CHIANG</creatorcontrib><creatorcontrib>HUANG SHIH-FU</creatorcontrib><creatorcontrib>LEE MING CHIANG</creatorcontrib><creatorcontrib>CHEN TZU-HUI</creatorcontrib><creatorcontrib>CHEN KUANG-HSIUNG</creatorcontrib><creatorcontrib>HSIEH PAO-MING</creatorcontrib><creatorcontrib>APPELT BERND KARL</creatorcontrib><title>SEMICONDUCTOR PACKAGE WITH SINGLE SIDED SUBSTRATE DESIGN AND MANUFACTURING METHODS THEREOF</title><description>A multilayer substrate includes a first outer conductive patterned layer, a first insulating layer exposing a portion of the first outer conductive patterned layer to define a first set of pads, a second outer conductive patterned layer, and a second insulating layer exposing a portion of the second outer conductive patterned layer to define a second set of pads. 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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | SEMICONDUCTOR PACKAGE WITH SINGLE SIDED SUBSTRATE DESIGN AND MANUFACTURING METHODS THEREOF |
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