MEMORY ERASING METHOD AND DRIVING CIRCUIT THEREOF

A memory erasing method and a driving circuit thereof are introduced, when cells are selected to be erased, the method includes setting gates of cells which are not selected to be erased and are located at a selected block, drains of all the cells in a selected bank, and the gate of the unselected c...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WANG YUUN, LU HSIAO-HUA, KUO CHIH-MING
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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