IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutte...
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creator | MCKEE JEFFERY A ALTICE, JR. PETER P |
description | A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel. |
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A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PICTORIAL COMMUNICATION, e.g. TELEVISION ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20131024&DB=EPODOC&CC=US&NR=2013277537A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20131024&DB=EPODOC&CC=US&NR=2013277537A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MCKEE JEFFERY A</creatorcontrib><creatorcontrib>ALTICE, JR. PETER P</creatorcontrib><title>IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE</title><description>A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. 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PETER P</creator><scope>EVB</scope></search><sort><creationdate>20131024</creationdate><title>IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE</title><author>MCKEE JEFFERY A ; ALTICE, JR. PETER P</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2013277537A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PICTORIAL COMMUNICATION, e.g. TELEVISION</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MCKEE JEFFERY A</creatorcontrib><creatorcontrib>ALTICE, JR. PETER P</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MCKEE JEFFERY A</au><au>ALTICE, JR. PETER P</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE</title><date>2013-10-24</date><risdate>2013</risdate><abstract>A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PICTORIAL COMMUNICATION, e.g. TELEVISION SEMICONDUCTOR DEVICES |
title | IMAGE SENSOR WITH A GATED STORAGE NODE LINKED TO TRANSFER GATE |
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