ON-CHIP CAPACITORS AND METHODS OF ASSEMBLING SAME

An on-chip capacitor a semiconductive substrate is fabricated in a passivation layer that is above the back-end metallization. At least three electrodes are configured in the on-chip capacitor and power and ground vias couple at least two of the at least three electrodes. The first via has a first-c...

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Bibliographische Detailangaben
Hauptverfasser: CHILDS MICHAEL A, FISCHER KEVIN J, NATARAJAN SANJAY S
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:An on-chip capacitor a semiconductive substrate is fabricated in a passivation layer that is above the back-end metallization. At least three electrodes are configured in the on-chip capacitor and power and ground vias couple at least two of the at least three electrodes. The first via has a first-coupled configuration to at least one of the first- second- and third electrodes and the second via has a second-coupled configuration to at least one of the first- second- and third electrodes.