FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD

A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of...

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Hauptverfasser:	SCHIECK BRIAN S, MARKS HOWARD LEE
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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creator	SCHIECK BRIAN S MARKS HOWARD LEE
description	A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.
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fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2013221354A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2013221354A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2013221354A13</originalsourceid><addsrcrecordid>eNrjZHBx8_EMUHD2ABLBrr6ezv5-LqHOIf5BCi6ergqefiGuQX6OPgrBnu4gytHZ2TU4WCE4MjjE1VfB0c9Fwdc1xMPfhYeBNS0xpziVF0pzMyi7uYY4e-imFuTHpxYXJCan5qWWxIcGGxkYGhsZGRqbmjgaGhOnCgDvjixz</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD</title><source>esp@cenet</source><creator>SCHIECK BRIAN S ; MARKS HOWARD LEE</creator><creatorcontrib>SCHIECK BRIAN S ; MARKS HOWARD LEE</creatorcontrib><description>A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130829&DB=EPODOC&CC=US&NR=2013221354A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130829&DB=EPODOC&CC=US&NR=2013221354A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SCHIECK BRIAN S</creatorcontrib><creatorcontrib>MARKS HOWARD LEE</creatorcontrib><title>FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD</title><description>A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHBx8_EMUHD2ABLBrr6ezv5-LqHOIf5BCi6ergqefiGuQX6OPgrBnu4gytHZ2TU4WCE4MjjE1VfB0c9Fwdc1xMPfhYeBNS0xpziVF0pzMyi7uYY4e-imFuTHpxYXJCan5qWWxIcGGxkYGhsZGRqbmjgaGhOnCgDvjixz</recordid><startdate>20130829</startdate><enddate>20130829</enddate><creator>SCHIECK BRIAN S</creator><creator>MARKS HOWARD LEE</creator><scope>EVB</scope></search><sort><creationdate>20130829</creationdate><title>FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD</title><author>SCHIECK BRIAN S ; MARKS HOWARD LEE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2013221354A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>SCHIECK BRIAN S</creatorcontrib><creatorcontrib>MARKS HOWARD LEE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SCHIECK BRIAN S</au><au>MARKS HOWARD LEE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD</title><date>2013-08-29</date><risdate>2013</risdate><abstract>A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.</abstract><oa>free_for_read</oa></addata></record>
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
title	FLIP CHIP SEMICONDUCTOR DIE INTERNAL SIGNAL ACCESS SYSTEM AND METHOD
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T22%3A07%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SCHIECK%20BRIAN%20S&rft.date=2013-08-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2013221354A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true