ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION

Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550° C.; depositing an oxide film layer over the nitride film layer, at an oxide...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: NOWAK THOMAS, REILLY PATRICK, PARK HEUNG LAK, XUAN GUANGCHI, ROCHA-ALVAREZ JUAN CARLOS, KIM BOK HOEN, RAJAGOPALAN NAGARAJAN, ZHOU JIANHUA, HAN XINHAI, LI JIGANG, SHAIKH SHAHID
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator NOWAK THOMAS
REILLY PATRICK
PARK HEUNG LAK
XUAN GUANGCHI
ROCHA-ALVAREZ JUAN CARLOS
KIM BOK HOEN
RAJAGOPALAN NAGARAJAN
ZHOU JIANHUA
HAN XINHAI
LI JIGANG
SHAIKH SHAHID
description Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550° C.; depositing an oxide film layer over the nitride film layer, at an oxide deposition temperature of about 600° C. or greater; repeating the above steps to deposit a film stack having alternating layers of the sacrificial films and the oxide films; forming a plurality of holes in the film stack; and depositing polysilicon in the plurality of holes in the film stack at a polysilicon process temperature of about 700° C. or greater, wherein the sacrificial film layers and the oxide film layers experience near zero shrinkage during the polysilicon deposition. Flash drive memory devices may also be made by these methods.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2013161629A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2013161629A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2013161629A13</originalsourceid><addsrcrecordid>eNqNy8EKgkAUhWE3LaJ6hwuthUZBaHkZR-eizpWZMbKNSEyrKEHfnyR6gFaHH76zjZabsgxOWzIVlgpcw-w1kPHKFigV8LWPDXlLuQI0-bexYdtq7lzsqCbJBpxHWTko2EKaQ6NW0MNFWU8SayjRr-e2XS16YrOPNo_xOYfDb3fRsVBe6jhM7yHM03gPr7AMnUtOIhWZyJIzivQ_9QHMEzob</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION</title><source>esp@cenet</source><creator>NOWAK THOMAS ; REILLY PATRICK ; PARK HEUNG LAK ; XUAN GUANGCHI ; ROCHA-ALVAREZ JUAN CARLOS ; KIM BOK HOEN ; RAJAGOPALAN NAGARAJAN ; ZHOU JIANHUA ; HAN XINHAI ; LI JIGANG ; SHAIKH SHAHID</creator><creatorcontrib>NOWAK THOMAS ; REILLY PATRICK ; PARK HEUNG LAK ; XUAN GUANGCHI ; ROCHA-ALVAREZ JUAN CARLOS ; KIM BOK HOEN ; RAJAGOPALAN NAGARAJAN ; ZHOU JIANHUA ; HAN XINHAI ; LI JIGANG ; SHAIKH SHAHID</creatorcontrib><description>Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550° C.; depositing an oxide film layer over the nitride film layer, at an oxide deposition temperature of about 600° C. or greater; repeating the above steps to deposit a film stack having alternating layers of the sacrificial films and the oxide films; forming a plurality of holes in the film stack; and depositing polysilicon in the plurality of holes in the film stack at a polysilicon process temperature of about 700° C. or greater, wherein the sacrificial film layers and the oxide film layers experience near zero shrinkage during the polysilicon deposition. Flash drive memory devices may also be made by these methods.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130627&amp;DB=EPODOC&amp;CC=US&amp;NR=2013161629A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130627&amp;DB=EPODOC&amp;CC=US&amp;NR=2013161629A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NOWAK THOMAS</creatorcontrib><creatorcontrib>REILLY PATRICK</creatorcontrib><creatorcontrib>PARK HEUNG LAK</creatorcontrib><creatorcontrib>XUAN GUANGCHI</creatorcontrib><creatorcontrib>ROCHA-ALVAREZ JUAN CARLOS</creatorcontrib><creatorcontrib>KIM BOK HOEN</creatorcontrib><creatorcontrib>RAJAGOPALAN NAGARAJAN</creatorcontrib><creatorcontrib>ZHOU JIANHUA</creatorcontrib><creatorcontrib>HAN XINHAI</creatorcontrib><creatorcontrib>LI JIGANG</creatorcontrib><creatorcontrib>SHAIKH SHAHID</creatorcontrib><title>ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION</title><description>Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550° C.; depositing an oxide film layer over the nitride film layer, at an oxide deposition temperature of about 600° C. or greater; repeating the above steps to deposit a film stack having alternating layers of the sacrificial films and the oxide films; forming a plurality of holes in the film stack; and depositing polysilicon in the plurality of holes in the film stack at a polysilicon process temperature of about 700° C. or greater, wherein the sacrificial film layers and the oxide film layers experience near zero shrinkage during the polysilicon deposition. Flash drive memory devices may also be made by these methods.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy8EKgkAUhWE3LaJ6hwuthUZBaHkZR-eizpWZMbKNSEyrKEHfnyR6gFaHH76zjZabsgxOWzIVlgpcw-w1kPHKFigV8LWPDXlLuQI0-bexYdtq7lzsqCbJBpxHWTko2EKaQ6NW0MNFWU8SayjRr-e2XS16YrOPNo_xOYfDb3fRsVBe6jhM7yHM03gPr7AMnUtOIhWZyJIzivQ_9QHMEzob</recordid><startdate>20130627</startdate><enddate>20130627</enddate><creator>NOWAK THOMAS</creator><creator>REILLY PATRICK</creator><creator>PARK HEUNG LAK</creator><creator>XUAN GUANGCHI</creator><creator>ROCHA-ALVAREZ JUAN CARLOS</creator><creator>KIM BOK HOEN</creator><creator>RAJAGOPALAN NAGARAJAN</creator><creator>ZHOU JIANHUA</creator><creator>HAN XINHAI</creator><creator>LI JIGANG</creator><creator>SHAIKH SHAHID</creator><scope>EVB</scope></search><sort><creationdate>20130627</creationdate><title>ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION</title><author>NOWAK THOMAS ; REILLY PATRICK ; PARK HEUNG LAK ; XUAN GUANGCHI ; ROCHA-ALVAREZ JUAN CARLOS ; KIM BOK HOEN ; RAJAGOPALAN NAGARAJAN ; ZHOU JIANHUA ; HAN XINHAI ; LI JIGANG ; SHAIKH SHAHID</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2013161629A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>NOWAK THOMAS</creatorcontrib><creatorcontrib>REILLY PATRICK</creatorcontrib><creatorcontrib>PARK HEUNG LAK</creatorcontrib><creatorcontrib>XUAN GUANGCHI</creatorcontrib><creatorcontrib>ROCHA-ALVAREZ JUAN CARLOS</creatorcontrib><creatorcontrib>KIM BOK HOEN</creatorcontrib><creatorcontrib>RAJAGOPALAN NAGARAJAN</creatorcontrib><creatorcontrib>ZHOU JIANHUA</creatorcontrib><creatorcontrib>HAN XINHAI</creatorcontrib><creatorcontrib>LI JIGANG</creatorcontrib><creatorcontrib>SHAIKH SHAHID</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NOWAK THOMAS</au><au>REILLY PATRICK</au><au>PARK HEUNG LAK</au><au>XUAN GUANGCHI</au><au>ROCHA-ALVAREZ JUAN CARLOS</au><au>KIM BOK HOEN</au><au>RAJAGOPALAN NAGARAJAN</au><au>ZHOU JIANHUA</au><au>HAN XINHAI</au><au>LI JIGANG</au><au>SHAIKH SHAHID</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION</title><date>2013-06-27</date><risdate>2013</risdate><abstract>Methods are provided for depositing a stack of film layers for use in vertical gates for 3D memory devices, by depositing a sacrificial nitride film layer at a sacrificial film deposition temperature greater than about 550° C.; depositing an oxide film layer over the nitride film layer, at an oxide deposition temperature of about 600° C. or greater; repeating the above steps to deposit a film stack having alternating layers of the sacrificial films and the oxide films; forming a plurality of holes in the film stack; and depositing polysilicon in the plurality of holes in the film stack at a polysilicon process temperature of about 700° C. or greater, wherein the sacrificial film layers and the oxide film layers experience near zero shrinkage during the polysilicon deposition. Flash drive memory devices may also be made by these methods.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2013161629A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title ZERO SHRINKAGE SMOOTH INTERFACE OXY-NITRIDE AND OXY-AMORPHOUS-SILICON STACKS FOR 3D MEMORY VERTICAL GATE APPLICATION
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-23T16%3A17%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NOWAK%20THOMAS&rft.date=2013-06-27&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2013161629A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true