MEMORY DEVICES HAVING BREAK CELLS
A representative memory device includes a cell array, at least one break cell that subdivides the cell array into bit cell arrays, and one or more power switches that are electrically coupled to the bit cell. In one embodiment, the break cell separates a connectivity of a first voltage and a second...
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creator | TAO DEREK HSU KUOYUAN TANG YUKIT |
description | A representative memory device includes a cell array, at least one break cell that subdivides the cell array into bit cell arrays, and one or more power switches that are electrically coupled to the bit cell. In one embodiment, the break cell separates a connectivity of a first voltage and a second voltage between at least two bit cell arrays so that the bit cell arrays can be selectively coupled to either the first voltage or the second voltage using the power switches. The power switches control the connection of each separated bit cell array of the cell array to either the first voltage or second voltage. |
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In one embodiment, the break cell separates a connectivity of a first voltage and a second voltage between at least two bit cell arrays so that the bit cell arrays can be selectively coupled to either the first voltage or the second voltage using the power switches. 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In one embodiment, the break cell separates a connectivity of a first voltage and a second voltage between at least two bit cell arrays so that the bit cell arrays can be selectively coupled to either the first voltage or the second voltage using the power switches. The power switches control the connection of each separated bit cell array of the cell array to either the first voltage or second voltage.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD0dfX1D4pUcHEN83R2DVbwcAzz9HNXcApydfRWcHb18QnmYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBobGhqam5qaGjobGxKkCAI2KIuk</recordid><startdate>20130620</startdate><enddate>20130620</enddate><creator>TAO DEREK</creator><creator>HSU KUOYUAN</creator><creator>TANG YUKIT</creator><scope>EVB</scope></search><sort><creationdate>20130620</creationdate><title>MEMORY DEVICES HAVING BREAK CELLS</title><author>TAO DEREK ; HSU KUOYUAN ; TANG YUKIT</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2013155751A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>TAO DEREK</creatorcontrib><creatorcontrib>HSU KUOYUAN</creatorcontrib><creatorcontrib>TANG YUKIT</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TAO DEREK</au><au>HSU KUOYUAN</au><au>TANG YUKIT</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMORY DEVICES HAVING BREAK CELLS</title><date>2013-06-20</date><risdate>2013</risdate><abstract>A representative memory device includes a cell array, at least one break cell that subdivides the cell array into bit cell arrays, and one or more power switches that are electrically coupled to the bit cell. In one embodiment, the break cell separates a connectivity of a first voltage and a second voltage between at least two bit cell arrays so that the bit cell arrays can be selectively coupled to either the first voltage or the second voltage using the power switches. The power switches control the connection of each separated bit cell array of the cell array to either the first voltage or second voltage.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | MEMORY DEVICES HAVING BREAK CELLS |
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