LOW OVERHEAD OPERATION LATENCY AWARE SCHEDULER

A method and apparatus for processing multi-cycle instructions include picking a multi-cycle instruction and directing the picked multi-cycle instruction to a pipeline. The pipeline includes a pipeline control configured to detect a latency and a repeat rate of the picked multi-cycle instruction and...

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Bibliographische Detailangaben
Hauptverfasser: VENKATARAMANAN GANESH, BUTLER MICHAEL G
Format: Patent
Sprache:eng
Schlagworte:
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