HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

A circuit arrangement and method utilize hybrid bonding techniques that combine wafer-wafer bonding processes with chip-chip and/or chip-wafer bonding processes to form a multi-layer semiconductor stack, e.g., by bonding together one or more sub-assemblies formed by wafer-wafer bonding together with...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	VANDERWIEL STEVEN PAUL, JOHNSON CHARLES LUTHER, BARTLEY GERALD K, HOOVER RUSSELL DEAN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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