NONVOLATILE MEMORY, MEMORY CONTROLLER, NONVOLATILE MEMORY ACCESSING METHOD, AND PROGRAM

Disclosed herein is a nonvolatile memory including: a nonvolatile memory cell device including at least a nonvolatile memory cell array accessible in units of a word and further accessible at least with a fixed latency in a first access mode and with a variable latency in a second access mode; a fir...

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Hauptverfasser: TSUTSUI KEIICHI, NAKANISHI KENICHI
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creator TSUTSUI KEIICHI
NAKANISHI KENICHI
description Disclosed herein is a nonvolatile memory including: a nonvolatile memory cell device including at least a nonvolatile memory cell array accessible in units of a word and further accessible at least with a fixed latency in a first access mode and with a variable latency in a second access mode; a first access path used in the first access mode; a second access path used in the second access mode; a first ECC processing part configured to be connected to the first access path and to perform error detection and correction using an ECC on the data output from the nonvolatile memory cell array in the first access mode; and a second ECC processing part configured to be connected to the second access path and to perform error detection and correction using the ECC on the data output from the nonvolatile memory cell array in the second access mode.
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subjects BASIC ELECTRONIC CIRCUITRY
CALCULATING
CODE CONVERSION IN GENERAL
CODING
COMPUTING
COUNTING
DECODING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
title NONVOLATILE MEMORY, MEMORY CONTROLLER, NONVOLATILE MEMORY ACCESSING METHOD, AND PROGRAM
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