FLIP-FLOP CIRCUIT, SCAN TEST CIRCUIT, AND METHOD OF CONTROLLING SCAN TEST CIRCUIT

Provided is a flip-flop circuit which a small-sized test circuit with hold free and can perform test in an actual operating frequency. A Pos-type F/F includes a master latch (Low level latch) that selectively receives data or scan test data in synchronization with a rising edge of a clock signal, an...

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Hauptverfasser:	NISHIOKA YUYA, IRIE YOSHINOBU
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING
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