Coupling Circuit, Driver Circuit and Method for Controlling a Coupling Circuit
A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2...
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creator | SCHIPANI MONICA DI PIRO LUIGI D'ABRAMO PAOLO SERVENTI RICCARDO |
description | A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential. |
format | Patent |
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A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CONTROLLING ; ELECTRICITY ; PHYSICS ; PULSE TECHNIQUE ; REGULATING ; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120913&DB=EPODOC&CC=US&NR=2012229175A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120913&DB=EPODOC&CC=US&NR=2012229175A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SCHIPANI MONICA</creatorcontrib><creatorcontrib>DI PIRO LUIGI</creatorcontrib><creatorcontrib>D'ABRAMO PAOLO</creatorcontrib><creatorcontrib>SERVENTI RICCARDO</creatorcontrib><title>Coupling Circuit, Driver Circuit and Method for Controlling a Coupling Circuit</title><description>A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROLLING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>REGULATING</subject><subject>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPBzzi8tyMnMS1dwzixKLs0s0VFwKcosSy2C8RUS81IUfFNLMvJTFNLygcL5eSVF-TlgLYkK6Lp5GFjTEnOKU3mhNDeDsptriLOHbmpBfnxqcUFicmpeakl8aLCRgaGRkZGlobmpo6ExcaoAjYU2wQ</recordid><startdate>20120913</startdate><enddate>20120913</enddate><creator>SCHIPANI MONICA</creator><creator>DI PIRO LUIGI</creator><creator>D'ABRAMO PAOLO</creator><creator>SERVENTI RICCARDO</creator><scope>EVB</scope></search><sort><creationdate>20120913</creationdate><title>Coupling Circuit, Driver Circuit and Method for Controlling a Coupling Circuit</title><author>SCHIPANI MONICA ; DI PIRO LUIGI ; D'ABRAMO PAOLO ; SERVENTI RICCARDO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2012229175A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROLLING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>REGULATING</topic><topic>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</topic><toplevel>online_resources</toplevel><creatorcontrib>SCHIPANI MONICA</creatorcontrib><creatorcontrib>DI PIRO LUIGI</creatorcontrib><creatorcontrib>D'ABRAMO PAOLO</creatorcontrib><creatorcontrib>SERVENTI RICCARDO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SCHIPANI MONICA</au><au>DI PIRO LUIGI</au><au>D'ABRAMO PAOLO</au><au>SERVENTI RICCARDO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Coupling Circuit, Driver Circuit and Method for Controlling a Coupling Circuit</title><date>2012-09-13</date><risdate>2012</risdate><abstract>A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY CONTROLLING ELECTRICITY PHYSICS PULSE TECHNIQUE REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES |
title | Coupling Circuit, Driver Circuit and Method for Controlling a Coupling Circuit |
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