SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME
Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semicond...
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creator | CHOI EUN-KYOUNG JEONG SEYOUNG CHOI KWANGUL MIN TAE HONG LEE CHUNGSUN KIM JUNG-HWAN |
description | Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2012171814A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2012171814A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2012171814A13</originalsourceid><addsrcrecordid>eNrjZLAKdvX1dPb3cwl1DvEPUghwdPZ2dHcNVnD0c1HwdQ3x8HcJVvB3U3BzdArydHYM8fRzVwjxcFUIdvR15WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGRobmhhaGJo6GxsSpAgA_Oimm</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME</title><source>esp@cenet</source><creator>CHOI EUN-KYOUNG ; JEONG SEYOUNG ; CHOI KWANGUL ; MIN TAE HONG ; LEE CHUNGSUN ; KIM JUNG-HWAN</creator><creatorcontrib>CHOI EUN-KYOUNG ; JEONG SEYOUNG ; CHOI KWANGUL ; MIN TAE HONG ; LEE CHUNGSUN ; KIM JUNG-HWAN</creatorcontrib><description>Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120705&DB=EPODOC&CC=US&NR=2012171814A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120705&DB=EPODOC&CC=US&NR=2012171814A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOI EUN-KYOUNG</creatorcontrib><creatorcontrib>JEONG SEYOUNG</creatorcontrib><creatorcontrib>CHOI KWANGUL</creatorcontrib><creatorcontrib>MIN TAE HONG</creatorcontrib><creatorcontrib>LEE CHUNGSUN</creatorcontrib><creatorcontrib>KIM JUNG-HWAN</creatorcontrib><title>SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME</title><description>Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKdvX1dPb3cwl1DvEPUghwdPZ2dHcNVnD0c1HwdQ3x8HcJVvB3U3BzdArydHYM8fRzVwjxcFUIdvR15WFgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgaGRobmhhaGJo6GxsSpAgA_Oimm</recordid><startdate>20120705</startdate><enddate>20120705</enddate><creator>CHOI EUN-KYOUNG</creator><creator>JEONG SEYOUNG</creator><creator>CHOI KWANGUL</creator><creator>MIN TAE HONG</creator><creator>LEE CHUNGSUN</creator><creator>KIM JUNG-HWAN</creator><scope>EVB</scope></search><sort><creationdate>20120705</creationdate><title>SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME</title><author>CHOI EUN-KYOUNG ; JEONG SEYOUNG ; CHOI KWANGUL ; MIN TAE HONG ; LEE CHUNGSUN ; KIM JUNG-HWAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2012171814A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOI EUN-KYOUNG</creatorcontrib><creatorcontrib>JEONG SEYOUNG</creatorcontrib><creatorcontrib>CHOI KWANGUL</creatorcontrib><creatorcontrib>MIN TAE HONG</creatorcontrib><creatorcontrib>LEE CHUNGSUN</creatorcontrib><creatorcontrib>KIM JUNG-HWAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOI EUN-KYOUNG</au><au>JEONG SEYOUNG</au><au>CHOI KWANGUL</au><au>MIN TAE HONG</au><au>LEE CHUNGSUN</au><au>KIM JUNG-HWAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME</title><date>2012-07-05</date><risdate>2012</risdate><abstract>Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME |
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