NON-OVERLAPPING CLOCK GENERATION

Techniques for generating precise non-overlap time and clock phase delay time across a desired frequency range are provided. A non-overlapping clock generation circuit comprises a delay lock loop (DLL) circuit that generates a control voltage to a clock generator circuit coupled thereto. The control...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MATHE LENNART, QUAN XIAOHONG, ALLADI DINESH J, SONG TONGYU
Format: Patent
Sprache:eng
Schlagworte:
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