Method for Reducing the Range in Resistivities of Semiconductor Crystalline Sheets Grown in a Multi-Lane Furnace

A method for reducing the range in resistivities of semiconductor crystalline sheets produced in a multi-lane growth furnace. A furnace for growing crystalline sheets is provided that includes a crucible with a material introduction region and a crystal growth region including a plurality of crystal...

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Hauptverfasser: RICHARDSON CHRISTINE, TARNOWSKI GARY J, REITSMA SCOTT, HUANG WEIDONG, KERNAN BRIAN D
Format: Patent
Sprache:eng
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