Chip Design having Integrated Fuse and Method for the Production Thereof

Chip Design having Integrated Fuse and Method for the Production Thereof

A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arrange...

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Hauptverfasser: MANNINGER MARIO, MINIXHOFER RAINER, ILZER KARL
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator MANNINGER MARIO
MINIXHOFER RAINER
ILZER KARL
description A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arranged within the chip design (1).
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2012104605A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2012104605A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2012104605A13</originalsourceid><addsrcrecordid>eNqNyrsKwjAUBuAsDqK-wwFnIamXXaqlDoJgnUto_lxAkpCc-vwuPoDTt3xL0bc-ZLqgBhfJ60-Ijm6R4YpmGOrmCtLR0B3skyGbCrEHPUoy88QhRRo8CpJdi4XV74rNz5XYdteh7XfIaUTNekIEj69nI1Wj5OEkj2e1_299Af6kNFI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Chip Design having Integrated Fuse and Method for the Production Thereof</title><source>esp@cenet</source><creator>MANNINGER MARIO ; MINIXHOFER RAINER ; ILZER KARL</creator><creatorcontrib>MANNINGER MARIO ; MINIXHOFER RAINER ; ILZER KARL</creatorcontrib><description>A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arranged within the chip design (1).</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120503&amp;DB=EPODOC&amp;CC=US&amp;NR=2012104605A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120503&amp;DB=EPODOC&amp;CC=US&amp;NR=2012104605A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MANNINGER MARIO</creatorcontrib><creatorcontrib>MINIXHOFER RAINER</creatorcontrib><creatorcontrib>ILZER KARL</creatorcontrib><title>Chip Design having Integrated Fuse and Method for the Production Thereof</title><description>A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arranged within the chip design (1).</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrsKwjAUBuAsDqK-wwFnIamXXaqlDoJgnUto_lxAkpCc-vwuPoDTt3xL0bc-ZLqgBhfJ60-Ijm6R4YpmGOrmCtLR0B3skyGbCrEHPUoy88QhRRo8CpJdi4XV74rNz5XYdteh7XfIaUTNekIEj69nI1Wj5OEkj2e1_299Af6kNFI</recordid><startdate>20120503</startdate><enddate>20120503</enddate><creator>MANNINGER MARIO</creator><creator>MINIXHOFER RAINER</creator><creator>ILZER KARL</creator><scope>EVB</scope></search><sort><creationdate>20120503</creationdate><title>Chip Design having Integrated Fuse and Method for the Production Thereof</title><author>MANNINGER MARIO ; MINIXHOFER RAINER ; ILZER KARL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2012104605A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MANNINGER MARIO</creatorcontrib><creatorcontrib>MINIXHOFER RAINER</creatorcontrib><creatorcontrib>ILZER KARL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MANNINGER MARIO</au><au>MINIXHOFER RAINER</au><au>ILZER KARL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip Design having Integrated Fuse and Method for the Production Thereof</title><date>2012-05-03</date><risdate>2012</risdate><abstract>A chip design (1) comprising an external supply connection (VBAT), an internal supply connection (VDD), an integrated circuit (2) that is coupled to the internal supply connection (VDD) for voltage supply, and a fuse (3) that electrically connects the internal supply connection (VBAT) and is arranged within the chip design (1).</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Chip Design having Integrated Fuse and Method for the Production Thereof
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T23%3A23%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MANNINGER%20MARIO&rft.date=2012-05-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2012104605A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true