LAYOUT DESIGN FOR A HIGH POWER, GaN-BASED FET

A FET includes a substrate, a buffer layer disposed on the substrate, a channel layer disposed over the buffer layer and a barrier layer disposed over the channel layer. Source, gate and drain electrodes are located over the barrier layer and extend in a longitudinal direction thereon. A portion of...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	PERES BORIS, POPHRISTIC MILAN, LIU LINLIN
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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