Write Buffer for Improved DRAM Write Access Patterns

The present invention relates to a method and respective system for operating a DRAM main memory. One buffer line is provided for multiple pages. When writing data to the buffer it is decided which to which buffer-line the data is written to based on its destination main memory address. A tuple cons...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BALKESEN CAGRI, PFEFFERKORN DANIEL, ROHR DAVID, SCHERZINGER STEFANIE, BUEHLER MARKUS, DORSCH RAINER, KAUFMANN MICHAEL W, HUTZL GUENTHER, SCHWARZ THOMAS
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator BALKESEN CAGRI
PFEFFERKORN DANIEL
ROHR DAVID
SCHERZINGER STEFANIE
BUEHLER MARKUS
DORSCH RAINER
KAUFMANN MICHAEL W
HUTZL GUENTHER
SCHWARZ THOMAS
description The present invention relates to a method and respective system for operating a DRAM main memory. One buffer line is provided for multiple pages. When writing data to the buffer it is decided which to which buffer-line the data is written to based on its destination main memory address. A tuple consisting of lower memory address and data is stored. Data entered into the buffer-line will be sorted by page in case the line is flushed to the main memory. Sorting the buffer entries results in less page openings and closings, since the data is re-arranged by memory address and therefore in logical order. By using one line for multiple pages only a fraction of memory of a common set-associative cache is needed, thus decreasing the amount of overhead significantly.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2011302367A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2011302367A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2011302367A13</originalsourceid><addsrcrecordid>eNrjZDAJL8osSVVwKk1LSy1SSMsvUvDMLSjKL0tNUXAJcvRVgEg7JienFhcrBCSWlKQW5RXzMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjA0NDYwMjYzNzR0Nj4lQBAGY2LKU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Write Buffer for Improved DRAM Write Access Patterns</title><source>esp@cenet</source><creator>BALKESEN CAGRI ; PFEFFERKORN DANIEL ; ROHR DAVID ; SCHERZINGER STEFANIE ; BUEHLER MARKUS ; DORSCH RAINER ; KAUFMANN MICHAEL W ; HUTZL GUENTHER ; SCHWARZ THOMAS</creator><creatorcontrib>BALKESEN CAGRI ; PFEFFERKORN DANIEL ; ROHR DAVID ; SCHERZINGER STEFANIE ; BUEHLER MARKUS ; DORSCH RAINER ; KAUFMANN MICHAEL W ; HUTZL GUENTHER ; SCHWARZ THOMAS</creatorcontrib><description>The present invention relates to a method and respective system for operating a DRAM main memory. One buffer line is provided for multiple pages. When writing data to the buffer it is decided which to which buffer-line the data is written to based on its destination main memory address. A tuple consisting of lower memory address and data is stored. Data entered into the buffer-line will be sorted by page in case the line is flushed to the main memory. Sorting the buffer entries results in less page openings and closings, since the data is re-arranged by memory address and therefore in logical order. By using one line for multiple pages only a fraction of memory of a common set-associative cache is needed, thus decreasing the amount of overhead significantly.</description><language>eng</language><subject>CALCULATING ; CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; PHYSICS ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20111208&amp;DB=EPODOC&amp;CC=US&amp;NR=2011302367A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20111208&amp;DB=EPODOC&amp;CC=US&amp;NR=2011302367A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BALKESEN CAGRI</creatorcontrib><creatorcontrib>PFEFFERKORN DANIEL</creatorcontrib><creatorcontrib>ROHR DAVID</creatorcontrib><creatorcontrib>SCHERZINGER STEFANIE</creatorcontrib><creatorcontrib>BUEHLER MARKUS</creatorcontrib><creatorcontrib>DORSCH RAINER</creatorcontrib><creatorcontrib>KAUFMANN MICHAEL W</creatorcontrib><creatorcontrib>HUTZL GUENTHER</creatorcontrib><creatorcontrib>SCHWARZ THOMAS</creatorcontrib><title>Write Buffer for Improved DRAM Write Access Patterns</title><description>The present invention relates to a method and respective system for operating a DRAM main memory. One buffer line is provided for multiple pages. When writing data to the buffer it is decided which to which buffer-line the data is written to based on its destination main memory address. A tuple consisting of lower memory address and data is stored. Data entered into the buffer-line will be sorted by page in case the line is flushed to the main memory. Sorting the buffer entries results in less page openings and closings, since the data is re-arranged by memory address and therefore in logical order. By using one line for multiple pages only a fraction of memory of a common set-associative cache is needed, thus decreasing the amount of overhead significantly.</description><subject>CALCULATING</subject><subject>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>PHYSICS</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><subject>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAJL8osSVVwKk1LSy1SSMsvUvDMLSjKL0tNUXAJcvRVgEg7JienFhcrBCSWlKQW5RXzMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjA0NDYwMjYzNzR0Nj4lQBAGY2LKU</recordid><startdate>20111208</startdate><enddate>20111208</enddate><creator>BALKESEN CAGRI</creator><creator>PFEFFERKORN DANIEL</creator><creator>ROHR DAVID</creator><creator>SCHERZINGER STEFANIE</creator><creator>BUEHLER MARKUS</creator><creator>DORSCH RAINER</creator><creator>KAUFMANN MICHAEL W</creator><creator>HUTZL GUENTHER</creator><creator>SCHWARZ THOMAS</creator><scope>EVB</scope></search><sort><creationdate>20111208</creationdate><title>Write Buffer for Improved DRAM Write Access Patterns</title><author>BALKESEN CAGRI ; PFEFFERKORN DANIEL ; ROHR DAVID ; SCHERZINGER STEFANIE ; BUEHLER MARKUS ; DORSCH RAINER ; KAUFMANN MICHAEL W ; HUTZL GUENTHER ; SCHWARZ THOMAS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2011302367A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CALCULATING</topic><topic>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>PHYSICS</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><topic>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</topic><toplevel>online_resources</toplevel><creatorcontrib>BALKESEN CAGRI</creatorcontrib><creatorcontrib>PFEFFERKORN DANIEL</creatorcontrib><creatorcontrib>ROHR DAVID</creatorcontrib><creatorcontrib>SCHERZINGER STEFANIE</creatorcontrib><creatorcontrib>BUEHLER MARKUS</creatorcontrib><creatorcontrib>DORSCH RAINER</creatorcontrib><creatorcontrib>KAUFMANN MICHAEL W</creatorcontrib><creatorcontrib>HUTZL GUENTHER</creatorcontrib><creatorcontrib>SCHWARZ THOMAS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BALKESEN CAGRI</au><au>PFEFFERKORN DANIEL</au><au>ROHR DAVID</au><au>SCHERZINGER STEFANIE</au><au>BUEHLER MARKUS</au><au>DORSCH RAINER</au><au>KAUFMANN MICHAEL W</au><au>HUTZL GUENTHER</au><au>SCHWARZ THOMAS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Write Buffer for Improved DRAM Write Access Patterns</title><date>2011-12-08</date><risdate>2011</risdate><abstract>The present invention relates to a method and respective system for operating a DRAM main memory. One buffer line is provided for multiple pages. When writing data to the buffer it is decided which to which buffer-line the data is written to based on its destination main memory address. A tuple consisting of lower memory address and data is stored. Data entered into the buffer-line will be sorted by page in case the line is flushed to the main memory. Sorting the buffer entries results in less page openings and closings, since the data is re-arranged by memory address and therefore in logical order. By using one line for multiple pages only a fraction of memory of a common set-associative cache is needed, thus decreasing the amount of overhead significantly.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2011302367A1
source esp@cenet
subjects CALCULATING
CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS
PHYSICS
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
title Write Buffer for Improved DRAM Write Access Patterns
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T19%3A53%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BALKESEN%20CAGRI&rft.date=2011-12-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2011302367A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true