FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY
A tiled display system includes a plurality of display devices coupled together via a display device interconnect. Video signals and power can be transmitted to any display device coupled to the display device interconnect and then be distributed to the other display devices coupled to the display d...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | SREERAM DURGA VENKATA PRASAD VENKATASUBRAMANIAN NARAYANAN |
| description | A tiled display system includes a plurality of display devices coupled together via a display device interconnect. Video signals and power can be transmitted to any display device coupled to the display device interconnect and then be distributed to the other display devices coupled to the display device interconnect. In situations where the power supply within a display device becomes inactive, the display device is capable of drawing power from neighboring display devices via the display device interconnect in order to power internal circuitry used to relay data signals. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2011267328A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2011267328A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2011267328A13</originalsourceid><addsrcrecordid>eNrjZNBxc_T0CXZ0c1Xw9AtxDXL29_NzdQ5RcPMPUgjx9HF1UQh39PFRcPEMDvBxjORhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhoZGZubGRhaOhsbEqQIAJYwmDQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY</title><source>esp@cenet</source><creator>SREERAM DURGA VENKATA PRASAD ; VENKATASUBRAMANIAN NARAYANAN</creator><creatorcontrib>SREERAM DURGA VENKATA PRASAD ; VENKATASUBRAMANIAN NARAYANAN</creatorcontrib><description>A tiled display system includes a plurality of display devices coupled together via a display device interconnect. Video signals and power can be transmitted to any display device coupled to the display device interconnect and then be distributed to the other display devices coupled to the display device interconnect. In situations where the power supply within a display device becomes inactive, the display device is capable of drawing power from neighboring display devices via the display device interconnect in order to power internal circuitry used to relay data signals.</description><language>eng</language><subject>ADVERTISING ; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION ; CALCULATING ; COMPUTING ; COUNTING ; CRYPTOGRAPHY ; DISPLAY ; EDUCATION ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS ; SEALS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111103&DB=EPODOC&CC=US&NR=2011267328A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20111103&DB=EPODOC&CC=US&NR=2011267328A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SREERAM DURGA VENKATA PRASAD</creatorcontrib><creatorcontrib>VENKATASUBRAMANIAN NARAYANAN</creatorcontrib><title>FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY</title><description>A tiled display system includes a plurality of display devices coupled together via a display device interconnect. Video signals and power can be transmitted to any display device coupled to the display device interconnect and then be distributed to the other display devices coupled to the display device interconnect. In situations where the power supply within a display device becomes inactive, the display device is capable of drawing power from neighboring display devices via the display device interconnect in order to power internal circuitry used to relay data signals.</description><subject>ADVERTISING</subject><subject>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>CRYPTOGRAPHY</subject><subject>DISPLAY</subject><subject>EDUCATION</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><subject>SEALS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNBxc_T0CXZ0c1Xw9AtxDXL29_NzdQ5RcPMPUgjx9HF1UQh39PFRcPEMDvBxjORhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGhoZGZubGRhaOhsbEqQIAJYwmDQ</recordid><startdate>20111103</startdate><enddate>20111103</enddate><creator>SREERAM DURGA VENKATA PRASAD</creator><creator>VENKATASUBRAMANIAN NARAYANAN</creator><scope>EVB</scope></search><sort><creationdate>20111103</creationdate><title>FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY</title><author>SREERAM DURGA VENKATA PRASAD ; VENKATASUBRAMANIAN NARAYANAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2011267328A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>ADVERTISING</topic><topic>ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>CRYPTOGRAPHY</topic><topic>DISPLAY</topic><topic>EDUCATION</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><topic>SEALS</topic><toplevel>online_resources</toplevel><creatorcontrib>SREERAM DURGA VENKATA PRASAD</creatorcontrib><creatorcontrib>VENKATASUBRAMANIAN NARAYANAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SREERAM DURGA VENKATA PRASAD</au><au>VENKATASUBRAMANIAN NARAYANAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY</title><date>2011-11-03</date><risdate>2011</risdate><abstract>A tiled display system includes a plurality of display devices coupled together via a display device interconnect. Video signals and power can be transmitted to any display device coupled to the display device interconnect and then be distributed to the other display devices coupled to the display device interconnect. In situations where the power supply within a display device becomes inactive, the display device is capable of drawing power from neighboring display devices via the display device interconnect in order to power internal circuitry used to relay data signals.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2011267328A1 |
| source | esp@cenet |
| subjects | ADVERTISING ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION CALCULATING COMPUTING COUNTING CRYPTOGRAPHY DISPLAY EDUCATION ELECTRIC DIGITAL DATA PROCESSING PHYSICS SEALS |
| title | FAILSAFE INTERCONNECT FOR TILED WALL DISPLAY |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T09%3A06%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SREERAM%20DURGA%20VENKATA%20PRASAD&rft.date=2011-11-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2011267328A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |