Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features

A method of depositing a metal seed layer with underlying barrier layer on a wafer substrate comprising a plurality of recessed device features. A first portion of the barrier layer is deposited on the wafer substrate without excessive build-up of barrier layer material on the openings to the plural...

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Hauptverfasser: CHIN BARRY L, ZHANG HONG, YAO GONGDA, CHIANG TONY, CHEN FUSEN E, XU ZHENG, DING PEIJUN, KOHARA GENE Y
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creator CHIN BARRY L
ZHANG HONG
YAO GONGDA
CHIANG TONY
CHEN FUSEN E
XU ZHENG
DING PEIJUN
KOHARA GENE Y
description A method of depositing a metal seed layer with underlying barrier layer on a wafer substrate comprising a plurality of recessed device features. A first portion of the barrier layer is deposited on the wafer substrate without excessive build-up of barrier layer material on the openings to the plurality of recessed device features, while obtaining bottom coverage without substantial sputtering of the bottom surface. Subsequently, a metal seed layer is deposited using the same techniques used to deposit the barrier layer, to avoid excessive build up of metal seed layer material on the openings to the features, with minimal sputtering of the barrier layer surface.
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subjects BASIC ELECTRIC ELEMENTS
CHEMICAL SURFACE TREATMENT
CHEMISTRY
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING MATERIAL WITH METALLIC MATERIAL
COATING METALLIC MATERIAL
DIFFUSION TREATMENT OF METALLIC MATERIAL
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL
METALLURGY
SEMICONDUCTOR DEVICES
SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
title Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features
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