Semiconductor package and semiconductor device
A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the part...
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creator | IGARASHI HATSUHIDE |
description | A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the partial antenna wiring, a third electrode pad that is different from each of the first and second electrode pads, and that is coupled to the second external terminal, and an electrostatic discharge (ESD) protection circuit that is coupled to the third electrode pad. |
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ELECTRICITY ; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS ; GENERATION</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110908&DB=EPODOC&CC=US&NR=2011216455A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110908&DB=EPODOC&CC=US&NR=2011216455A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IGARASHI HATSUHIDE</creatorcontrib><title>Semiconductor package and semiconductor device</title><description>A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the partial antenna wiring, a third electrode pad that is different from each of the first and second electrode pads, and that is coupled to the second external terminal, and an electrostatic discharge (ESD) protection circuit that is coupled to the third electrode pad.</description><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</subject><subject>GENERATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNALTs3NTM7PSylNLskvUihITM5OTE9VSMxLUShGkUlJLctMTuVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFQO2peakl8aHBRgaGhkaGZiampo6GxsSpAgDN3ivM</recordid><startdate>20110908</startdate><enddate>20110908</enddate><creator>IGARASHI HATSUHIDE</creator><scope>EVB</scope></search><sort><creationdate>20110908</creationdate><title>Semiconductor package and semiconductor device</title><author>IGARASHI HATSUHIDE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2011216455A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</topic><topic>GENERATION</topic><toplevel>online_resources</toplevel><creatorcontrib>IGARASHI HATSUHIDE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IGARASHI HATSUHIDE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor package and semiconductor device</title><date>2011-09-08</date><risdate>2011</risdate><abstract>A semiconductor device, includes a chip, a first external terminal, a second external terminal, and a partial antenna wiring that is coupled to the first external terminal, and that constitutes a matching circuit, wherein the chip includes first and second electrode pads that are coupled to the partial antenna wiring, a third electrode pad that is different from each of the first and second electrode pads, and that is coupled to the second external terminal, and an electrostatic discharge (ESD) protection circuit that is coupled to the third electrode pad.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
recordid | cdi_epo_espacenet_US2011216455A1 |
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subjects | CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS GENERATION |
title | Semiconductor package and semiconductor device |
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