Integrated circuit memory with word line driving helper circuits

An integrated circuit memory 2 incorporates a first array of bit cells 4 and a second array of bit cells 6 with word line driver circuitry 8 disposed therebetween. Word line helper circuitry 18, 20 is disposed at the opposite edges of the array 4, 6 to the word line driver circuitry 8. The helper ci...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	YEUNG GUS, WIATROWSKI JACEK, SHANMUGAM AMARNATH, CHONG YEW KEONG
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!