SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation o...
Gespeichert in:
| Hauptverfasser: | , , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | KURAISHI TAKASHI AZUMA YURI YASU YOSHIHIKO YANAGISAWA KAZUMASA IGARASHI YASUTO |
| description | A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2011068826A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2011068826A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2011068826A13</originalsourceid><addsrcrecordid>eNrjZFAPdvX1dPb3cwl1DvEPUvD0C3F1D3IMcXVRcPYMcg71DFFwcQ3zdHblYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoaGBmYWFkZmjobGxKkCAIs5JO8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><source>esp@cenet</source><creator>KURAISHI TAKASHI ; AZUMA YURI ; YASU YOSHIHIKO ; YANAGISAWA KAZUMASA ; IGARASHI YASUTO</creator><creatorcontrib>KURAISHI TAKASHI ; AZUMA YURI ; YASU YOSHIHIKO ; YANAGISAWA KAZUMASA ; IGARASHI YASUTO</creatorcontrib><description>A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INFORMATION STORAGE ; PHYSICS ; PULSE TECHNIQUE ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110324&DB=EPODOC&CC=US&NR=2011068826A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110324&DB=EPODOC&CC=US&NR=2011068826A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KURAISHI TAKASHI</creatorcontrib><creatorcontrib>AZUMA YURI</creatorcontrib><creatorcontrib>YASU YOSHIHIKO</creatorcontrib><creatorcontrib>YANAGISAWA KAZUMASA</creatorcontrib><creatorcontrib>IGARASHI YASUTO</creatorcontrib><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><description>A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAPdvX1dPb3cwl1DvEPUvD0C3F1D3IMcXVRcPYMcg71DFFwcQ3zdHblYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoaGBmYWFkZmjobGxKkCAIs5JO8</recordid><startdate>20110324</startdate><enddate>20110324</enddate><creator>KURAISHI TAKASHI</creator><creator>AZUMA YURI</creator><creator>YASU YOSHIHIKO</creator><creator>YANAGISAWA KAZUMASA</creator><creator>IGARASHI YASUTO</creator><scope>EVB</scope></search><sort><creationdate>20110324</creationdate><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><author>KURAISHI TAKASHI ; AZUMA YURI ; YASU YOSHIHIKO ; YANAGISAWA KAZUMASA ; IGARASHI YASUTO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2011068826A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>KURAISHI TAKASHI</creatorcontrib><creatorcontrib>AZUMA YURI</creatorcontrib><creatorcontrib>YASU YOSHIHIKO</creatorcontrib><creatorcontrib>YANAGISAWA KAZUMASA</creatorcontrib><creatorcontrib>IGARASHI YASUTO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KURAISHI TAKASHI</au><au>AZUMA YURI</au><au>YASU YOSHIHIKO</au><au>YANAGISAWA KAZUMASA</au><au>IGARASHI YASUTO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE</title><date>2011-03-24</date><risdate>2011</risdate><abstract>A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2011068826A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS PULSE TECHNIQUE SEMICONDUCTOR DEVICES STATIC STORES |
| title | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T00%3A33%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KURAISHI%20TAKASHI&rft.date=2011-03-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2011068826A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |