SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME

A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly include a laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semicond...

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Hauptverfasser: TAKAHASHI YASUHIKO, CHAKIHARA HIRAKU, OKUYAMA KOUSUKE, MONIWA MASAHIRO
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creator TAKAHASHI YASUHIKO
CHAKIHARA HIRAKU
OKUYAMA KOUSUKE
MONIWA MASAHIRO
description A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly include a laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this sequence, a gate insulating film of silicon oxide formed on the surface of the side wall of the laminate, and a gate electrode formed so as to cover the side wall of the laminate. The vertical MISFETs are perfect depletion type MISFETs.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
title SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME
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