System And Method For Processor Power Delivery And Thermal Management
A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allo...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | HOGE CARL E HARTKE DAVID H DIBENE, II JOSEPH TED DERIAN EDWARD J |
| description | A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2010325882A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2010325882A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2010325882A13</originalsourceid><addsrcrecordid>eNrjZHANriwuSc1VcMxLUfBNLcnIT1Fwyy9SCCjKT04tLgax8stTixRcUnMyy1KLKsHqQjJSi3ITcxR8E_MS01NzU_NKeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGhgbGRqYWFkaOhMXGqAE6AM0w</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System And Method For Processor Power Delivery And Thermal Management</title><source>esp@cenet</source><creator>HOGE CARL E ; HARTKE DAVID H ; DIBENE, II JOSEPH TED ; DERIAN EDWARD J</creator><creatorcontrib>HOGE CARL E ; HARTKE DAVID H ; DIBENE, II JOSEPH TED ; DERIAN EDWARD J</creatorcontrib><description>A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; COMPUTING ; COUNTING ; CURRENT COLLECTORS ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LINE CONNECTORS ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PHYSICS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101230&DB=EPODOC&CC=US&NR=2010325882A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101230&DB=EPODOC&CC=US&NR=2010325882A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HOGE CARL E</creatorcontrib><creatorcontrib>HARTKE DAVID H</creatorcontrib><creatorcontrib>DIBENE, II JOSEPH TED</creatorcontrib><creatorcontrib>DERIAN EDWARD J</creatorcontrib><title>System And Method For Processor Power Delivery And Thermal Management</title><description>A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>CURRENT COLLECTORS</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LINE CONNECTORS</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHANriwuSc1VcMxLUfBNLcnIT1Fwyy9SCCjKT04tLgax8stTixRcUnMyy1KLKsHqQjJSi3ITcxR8E_MS01NzU_NKeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGhgbGRqYWFkaOhMXGqAE6AM0w</recordid><startdate>20101230</startdate><enddate>20101230</enddate><creator>HOGE CARL E</creator><creator>HARTKE DAVID H</creator><creator>DIBENE, II JOSEPH TED</creator><creator>DERIAN EDWARD J</creator><scope>EVB</scope></search><sort><creationdate>20101230</creationdate><title>System And Method For Processor Power Delivery And Thermal Management</title><author>HOGE CARL E ; HARTKE DAVID H ; DIBENE, II JOSEPH TED ; DERIAN EDWARD J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2010325882A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>CURRENT COLLECTORS</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LINE CONNECTORS</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HOGE CARL E</creatorcontrib><creatorcontrib>HARTKE DAVID H</creatorcontrib><creatorcontrib>DIBENE, II JOSEPH TED</creatorcontrib><creatorcontrib>DERIAN EDWARD J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HOGE CARL E</au><au>HARTKE DAVID H</au><au>DIBENE, II JOSEPH TED</au><au>DERIAN EDWARD J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System And Method For Processor Power Delivery And Thermal Management</title><date>2010-12-30</date><risdate>2010</risdate><abstract>A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2010325882A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS CALCULATING CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS COMPUTING COUNTING CURRENT COLLECTORS ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY LINE CONNECTORS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PHYSICS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | System And Method For Processor Power Delivery And Thermal Management |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-13T20%3A57%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HOGE%20CARL%20E&rft.date=2010-12-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2010325882A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |