Through Substrate Vias

Through Substrate Vias

Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part...

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Hauptverfasser: WEBB BUCKNELL CHAPMAN, COTTE JOHN MICHAEL, JAHNES CHRISTOPHER VINCENT
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator WEBB BUCKNELL CHAPMAN
COTTE JOHN MICHAEL
JAHNES CHRISTOPHER VINCENT
description Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Through Substrate Vias
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