SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE
A semiconductor bridge die may have an "H-design" or "trapezoidal" configuration in which a center bridge segment is flanked by one or more angled walls on each side of the bridge segment. Each wall is plated with a conductive material, thereby providing a continuous conductive p...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | BOUCHER CRAIG J MARTINEZ-TOVAR BERNARDO |
description | A semiconductor bridge die may have an "H-design" or "trapezoidal" configuration in which a center bridge segment is flanked by one or more angled walls on each side of the bridge segment. Each wall is plated with a conductive material, thereby providing a continuous conductive path across the top surface of the die. A bottom surface of the die may be connected to a top surface of a header by epoxy in various configurations. The plated angled walls facilitate the solderable connection of the walls to a plated top surface of each of several pins on a top surface of the header, thereby providing a continuous electrical connection between the pins and the die. Also, a method is provided for manufacturing a semiconductor bridge die in accordance with the various embodiments of the die. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2010258914A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2010258914A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2010258914A13</originalsourceid><addsrcrecordid>eNrjZNAKDg1yc3R2VfD1D_ULcXTycVUIdvX1dPb3cwl1DvEPUnAK8nRxd1Vw8XTlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoYGRqYWloYmjobGxKkCAOdOJZM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE</title><source>esp@cenet</source><creator>BOUCHER CRAIG J ; MARTINEZ-TOVAR BERNARDO</creator><creatorcontrib>BOUCHER CRAIG J ; MARTINEZ-TOVAR BERNARDO</creatorcontrib><description>A semiconductor bridge die may have an "H-design" or "trapezoidal" configuration in which a center bridge segment is flanked by one or more angled walls on each side of the bridge segment. Each wall is plated with a conductive material, thereby providing a continuous conductive path across the top surface of the die. A bottom surface of the die may be connected to a top surface of a header by epoxy in various configurations. The plated angled walls facilitate the solderable connection of the walls to a plated top surface of each of several pins on a top surface of the header, thereby providing a continuous electrical connection between the pins and the die. Also, a method is provided for manufacturing a semiconductor bridge die in accordance with the various embodiments of the die.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101014&DB=EPODOC&CC=US&NR=2010258914A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101014&DB=EPODOC&CC=US&NR=2010258914A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BOUCHER CRAIG J</creatorcontrib><creatorcontrib>MARTINEZ-TOVAR BERNARDO</creatorcontrib><title>SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE</title><description>A semiconductor bridge die may have an "H-design" or "trapezoidal" configuration in which a center bridge segment is flanked by one or more angled walls on each side of the bridge segment. Each wall is plated with a conductive material, thereby providing a continuous conductive path across the top surface of the die. A bottom surface of the die may be connected to a top surface of a header by epoxy in various configurations. The plated angled walls facilitate the solderable connection of the walls to a plated top surface of each of several pins on a top surface of the header, thereby providing a continuous electrical connection between the pins and the die. Also, a method is provided for manufacturing a semiconductor bridge die in accordance with the various embodiments of the die.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAKDg1yc3R2VfD1D_ULcXTycVUIdvX1dPb3cwl1DvEPUnAK8nRxd1Vw8XTlYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoYGRqYWloYmjobGxKkCAOdOJZM</recordid><startdate>20101014</startdate><enddate>20101014</enddate><creator>BOUCHER CRAIG J</creator><creator>MARTINEZ-TOVAR BERNARDO</creator><scope>EVB</scope></search><sort><creationdate>20101014</creationdate><title>SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE</title><author>BOUCHER CRAIG J ; MARTINEZ-TOVAR BERNARDO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2010258914A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BOUCHER CRAIG J</creatorcontrib><creatorcontrib>MARTINEZ-TOVAR BERNARDO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BOUCHER CRAIG J</au><au>MARTINEZ-TOVAR BERNARDO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE</title><date>2010-10-14</date><risdate>2010</risdate><abstract>A semiconductor bridge die may have an "H-design" or "trapezoidal" configuration in which a center bridge segment is flanked by one or more angled walls on each side of the bridge segment. Each wall is plated with a conductive material, thereby providing a continuous conductive path across the top surface of the die. A bottom surface of the die may be connected to a top surface of a header by epoxy in various configurations. The plated angled walls facilitate the solderable connection of the walls to a plated top surface of each of several pins on a top surface of the header, thereby providing a continuous electrical connection between the pins and the die. Also, a method is provided for manufacturing a semiconductor bridge die in accordance with the various embodiments of the die.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2010258914A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SURFACE MOUNTABLE SEMICONDUCTOR BRIDGE DIE |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T09%3A53%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BOUCHER%20CRAIG%20J&rft.date=2010-10-14&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2010258914A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |