Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact
Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of si...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | SCHWARTZ WOLFGANG STEINMANN PHILIPP SCHIEKOFER MANFRED KRAUS MICHAEL SCHARNAGL THOMAS |
description | Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of silicon inside the cavity up to the surface of the top silicon layer. An electrical device comprising an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer formed according to the inventive method. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2010244184A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2010244184A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2010244184A13</originalsourceid><addsrcrecordid>eNqNjjEKwkAQRdNYiHqHAWsh0RS2Gg0KWkWxlGEzMQvrzrKZKN7Pg7mKhYKFMPDh83nzutF9S1JzCVxBzv6s7QnQwtKQEq8VGsjYCiqBOcmVyAJC0TrHXuCAFfmwLkFqCq2vUNEThLBjB4U2WrGFDd7C7FW_q1G4tW1ag8L-A_P9eEEXHXhrq0xbPr2KVtW_5fpRp0LT0OCdvWiYL3fZakSOj9S44GVJjvtiHCfxOE2TaTpLJv-tHoHCYIA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact</title><source>esp@cenet</source><creator>SCHWARTZ WOLFGANG ; STEINMANN PHILIPP ; SCHIEKOFER MANFRED ; KRAUS MICHAEL ; SCHARNAGL THOMAS</creator><creatorcontrib>SCHWARTZ WOLFGANG ; STEINMANN PHILIPP ; SCHIEKOFER MANFRED ; KRAUS MICHAEL ; SCHARNAGL THOMAS</creatorcontrib><description>Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of silicon inside the cavity up to the surface of the top silicon layer. An electrical device comprising an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer formed according to the inventive method.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100930&DB=EPODOC&CC=US&NR=2010244184A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100930&DB=EPODOC&CC=US&NR=2010244184A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SCHWARTZ WOLFGANG</creatorcontrib><creatorcontrib>STEINMANN PHILIPP</creatorcontrib><creatorcontrib>SCHIEKOFER MANFRED</creatorcontrib><creatorcontrib>KRAUS MICHAEL</creatorcontrib><creatorcontrib>SCHARNAGL THOMAS</creatorcontrib><title>Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact</title><description>Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of silicon inside the cavity up to the surface of the top silicon layer. An electrical device comprising an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer formed according to the inventive method.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjjEKwkAQRdNYiHqHAWsh0RS2Gg0KWkWxlGEzMQvrzrKZKN7Pg7mKhYKFMPDh83nzutF9S1JzCVxBzv6s7QnQwtKQEq8VGsjYCiqBOcmVyAJC0TrHXuCAFfmwLkFqCq2vUNEThLBjB4U2WrGFDd7C7FW_q1G4tW1ag8L-A_P9eEEXHXhrq0xbPr2KVtW_5fpRp0LT0OCdvWiYL3fZakSOj9S44GVJjvtiHCfxOE2TaTpLJv-tHoHCYIA</recordid><startdate>20100930</startdate><enddate>20100930</enddate><creator>SCHWARTZ WOLFGANG</creator><creator>STEINMANN PHILIPP</creator><creator>SCHIEKOFER MANFRED</creator><creator>KRAUS MICHAEL</creator><creator>SCHARNAGL THOMAS</creator><scope>EVB</scope></search><sort><creationdate>20100930</creationdate><title>Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact</title><author>SCHWARTZ WOLFGANG ; STEINMANN PHILIPP ; SCHIEKOFER MANFRED ; KRAUS MICHAEL ; SCHARNAGL THOMAS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2010244184A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SCHWARTZ WOLFGANG</creatorcontrib><creatorcontrib>STEINMANN PHILIPP</creatorcontrib><creatorcontrib>SCHIEKOFER MANFRED</creatorcontrib><creatorcontrib>KRAUS MICHAEL</creatorcontrib><creatorcontrib>SCHARNAGL THOMAS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SCHWARTZ WOLFGANG</au><au>STEINMANN PHILIPP</au><au>SCHIEKOFER MANFRED</au><au>KRAUS MICHAEL</au><au>SCHARNAGL THOMAS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact</title><date>2010-09-30</date><risdate>2010</risdate><abstract>Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of silicon inside the cavity up to the surface of the top silicon layer. An electrical device comprising an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer formed according to the inventive method.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2010244184A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Method of Forming an Electrical Contact Between a Support Wafer and the Surface of a Top Silicon Layer of a Silicon-on-Insulator Wafer and an Electrical Device Including Such an Electrical Contact |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T18%3A58%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SCHWARTZ%20WOLFGANG&rft.date=2010-09-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2010244184A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |