Low-defect density gallium nitride semiconductor structures and fabrication methods

Low-defect density gallium nitride semiconductor structures and fabrication methods

A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises...

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Hauptverfasser: ZHELEVA TSVETANKA S, DERENGE MICHAEL A, SHAH PANKAJ B, EWING DANIEL J
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator ZHELEVA TSVETANKA S
DERENGE MICHAEL A
SHAH PANKAJ B
EWING DANIEL J
description A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein the second dislocation density may be lower than the first dislocation density. In addition, a method for fabricating a gallium nitride semiconductor layer that includes masking an underlying gallium nitride layer with a mask that comprises an array of columns and growing the underlying gallium nitride layer through the columns and onto said mask using metal-organic chemical vapor deposition pendeo-epitaxy to thereby form a pendeo-epitaxial gallium nitride layer coalesced on said mask to form a continuous pendeo-epitaxial monocrystalline gallium nitride semiconductor layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2010171124A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2010171124A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2010171124A13</originalsourceid><addsrcrecordid>eNqNyj0KAjEQQOE0FqLeYcB6YbMK1iKKhd1qvcTMrA7kZ8lMEG-vhQewel_x5qa_5FeDNJJXQErC-oaHC4FrhMRaGAmEIvucsHrNBUTLF7WQgEsIo7sX9k45J4ikz4yyNLPRBaHVrwuzPh2vh3NDUx5IJucpkQ63vmtta3fWdtu93fx3fQCyvDpE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Low-defect density gallium nitride semiconductor structures and fabrication methods</title><source>esp@cenet</source><creator>ZHELEVA TSVETANKA S ; DERENGE MICHAEL A ; SHAH PANKAJ B ; EWING DANIEL J</creator><creatorcontrib>ZHELEVA TSVETANKA S ; DERENGE MICHAEL A ; SHAH PANKAJ B ; EWING DANIEL J</creatorcontrib><description>A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein the second dislocation density may be lower than the first dislocation density. In addition, a method for fabricating a gallium nitride semiconductor layer that includes masking an underlying gallium nitride layer with a mask that comprises an array of columns and growing the underlying gallium nitride layer through the columns and onto said mask using metal-organic chemical vapor deposition pendeo-epitaxy to thereby form a pendeo-epitaxial gallium nitride layer coalesced on said mask to form a continuous pendeo-epitaxial monocrystalline gallium nitride semiconductor layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20100708&amp;DB=EPODOC&amp;CC=US&amp;NR=2010171124A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20100708&amp;DB=EPODOC&amp;CC=US&amp;NR=2010171124A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZHELEVA TSVETANKA S</creatorcontrib><creatorcontrib>DERENGE MICHAEL A</creatorcontrib><creatorcontrib>SHAH PANKAJ B</creatorcontrib><creatorcontrib>EWING DANIEL J</creatorcontrib><title>Low-defect density gallium nitride semiconductor structures and fabrication methods</title><description>A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein the second dislocation density may be lower than the first dislocation density. In addition, a method for fabricating a gallium nitride semiconductor layer that includes masking an underlying gallium nitride layer with a mask that comprises an array of columns and growing the underlying gallium nitride layer through the columns and onto said mask using metal-organic chemical vapor deposition pendeo-epitaxy to thereby form a pendeo-epitaxial gallium nitride layer coalesced on said mask to form a continuous pendeo-epitaxial monocrystalline gallium nitride semiconductor layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyj0KAjEQQOE0FqLeYcB6YbMK1iKKhd1qvcTMrA7kZ8lMEG-vhQewel_x5qa_5FeDNJJXQErC-oaHC4FrhMRaGAmEIvucsHrNBUTLF7WQgEsIo7sX9k45J4ikz4yyNLPRBaHVrwuzPh2vh3NDUx5IJucpkQ63vmtta3fWdtu93fx3fQCyvDpE</recordid><startdate>20100708</startdate><enddate>20100708</enddate><creator>ZHELEVA TSVETANKA S</creator><creator>DERENGE MICHAEL A</creator><creator>SHAH PANKAJ B</creator><creator>EWING DANIEL J</creator><scope>EVB</scope></search><sort><creationdate>20100708</creationdate><title>Low-defect density gallium nitride semiconductor structures and fabrication methods</title><author>ZHELEVA TSVETANKA S ; DERENGE MICHAEL A ; SHAH PANKAJ B ; EWING DANIEL J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2010171124A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ZHELEVA TSVETANKA S</creatorcontrib><creatorcontrib>DERENGE MICHAEL A</creatorcontrib><creatorcontrib>SHAH PANKAJ B</creatorcontrib><creatorcontrib>EWING DANIEL J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZHELEVA TSVETANKA S</au><au>DERENGE MICHAEL A</au><au>SHAH PANKAJ B</au><au>EWING DANIEL J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Low-defect density gallium nitride semiconductor structures and fabrication methods</title><date>2010-07-08</date><risdate>2010</risdate><abstract>A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein the second dislocation density may be lower than the first dislocation density. In addition, a method for fabricating a gallium nitride semiconductor layer that includes masking an underlying gallium nitride layer with a mask that comprises an array of columns and growing the underlying gallium nitride layer through the columns and onto said mask using metal-organic chemical vapor deposition pendeo-epitaxy to thereby form a pendeo-epitaxial gallium nitride layer coalesced on said mask to form a continuous pendeo-epitaxial monocrystalline gallium nitride semiconductor layer.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Low-defect density gallium nitride semiconductor structures and fabrication methods
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T18%3A14%3A32IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ZHELEVA%20TSVETANKA%20S&rft.date=2010-07-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2010171124A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true