METHOD AND DEVICE FOR IMPROVING CLOCK STABILITY

METHOD AND DEVICE FOR IMPROVING CLOCK STABILITY

A method and device for improving clock stability are provided. The method includes: determining whether a difference between a current sender timestamp (ST) and a current receiver timestamp (RT) is a mutated value; pre-processing the ST and RT, if the difference between the ST and RT is a mutated v...

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Hauptverfasser: SUN WENHUA, LI BINGBO, XU WENGUANG, WANG XIAOBO, YANG SHENGHING, DENG YOUHAO, WANG JIHUI
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
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creator SUN WENHUA
LI BINGBO
XU WENGUANG
WANG XIAOBO
YANG SHENGHING
DENG YOUHAO
WANG JIHUI
description A method and device for improving clock stability are provided. The method includes: determining whether a difference between a current sender timestamp (ST) and a current receiver timestamp (RT) is a mutated value; pre-processing the ST and RT, if the difference between the ST and RT is a mutated value; acquiring a service clock according to the pre-processed ST and RT; and sending time division multiplex (TDM) data according to the service clock.. Through the embodiments of the present disclosure, a packet delay variance (PDV) may be smoothed, the impairment of the PDV on clock recovery may be reduced, the quality of the clock recovery may be improved, and the problem of clock synchronization may be solved through the mutation processing on the timestamps.
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subjects ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
title METHOD AND DEVICE FOR IMPROVING CLOCK STABILITY
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