Power Event Indicator for Managed Memory Device

A host device coupled to a managed memory device (e.g., a managed NAND device) generates a signal indicative of an expected power event. The signal is received by the managed memory device which performs one or more operations in response to the signal. In some implementations, a pin is added to a power management chip that provides a signal to interrupt the managed memory device when a power event (e.g., power failure, system reset) is expected to occur. The signal provides the managed memory device time to finish one or more operations (e.g., the last physical operation) and to place the managed memory device in a known and/or safe state prior to the occurrence of the power event.