Controlling Asynchronous Clock Domains to Perform Synchronous Operations
Mechanisms for controlling asynchronous clock domains to perform synchronous operations are provided. With these mechanisms, when a synchronous operation is to be performed on a chip, the latches of the functional elements of the chip are controlled by a synchronous clock so that the latches are con...
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| creator | RILEY MACK W CHELSTROM NATHAN P |
| description | Mechanisms for controlling asynchronous clock domains to perform synchronous operations are provided. With these mechanisms, when a synchronous operation is to be performed on a chip, the latches of the functional elements of the chip are controlled by a synchronous clock so that the latches are controlled synchronously even across asynchronous boundaries of the chip. The synchronous operation may then be performed and the chip's functional elements returned to being controlled by a local clock in an asynchronous manner after completion of the synchronous operation. This synchronous operation may be, for example, a power on reset (POR) operation, a manufacturing test sequence, debug operation, or the like. |
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This synchronous operation may be, for example, a power on reset (POR) operation, a manufacturing test sequence, debug operation, or the like.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; MULTIPLEX COMMUNICATION ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090423&DB=EPODOC&CC=US&NR=2009106575A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090423&DB=EPODOC&CC=US&NR=2009106575A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RILEY MACK W</creatorcontrib><creatorcontrib>CHELSTROM NATHAN P</creatorcontrib><title>Controlling Asynchronous Clock Domains to Perform Synchronous Operations</title><description>Mechanisms for controlling asynchronous clock domains to perform synchronous operations are provided. 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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY MULTIPLEX COMMUNICATION PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | Controlling Asynchronous Clock Domains to Perform Synchronous Operations |
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