Adjustable test pattern results latency

Adjustable test pattern results latency

A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequenc...

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Hauptverfasser: MCGOLDRICK MICHAEL F, MILLEY DAVID A, ENG STEPHEN K, BORROZ WILLIAM T
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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creator MCGOLDRICK MICHAEL F
MILLEY DAVID A
ENG STEPHEN K
BORROZ WILLIAM T
description A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2009100303A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2009100303A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2009100303A13</originalsourceid><addsrcrecordid>eNrjZFB3TMkqLS5JTMpJVShJLS5RKEgsKUktylMoSi0uzSkpVshJLEnNS67kYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBgaWhgYGxgbGjobGxKkCAGcBKSU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Adjustable test pattern results latency</title><source>esp@cenet</source><creator>MCGOLDRICK MICHAEL F ; MILLEY DAVID A ; ENG STEPHEN K ; BORROZ WILLIAM T</creator><creatorcontrib>MCGOLDRICK MICHAEL F ; MILLEY DAVID A ; ENG STEPHEN K ; BORROZ WILLIAM T</creatorcontrib><description>A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090416&amp;DB=EPODOC&amp;CC=US&amp;NR=2009100303A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090416&amp;DB=EPODOC&amp;CC=US&amp;NR=2009100303A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MCGOLDRICK MICHAEL F</creatorcontrib><creatorcontrib>MILLEY DAVID A</creatorcontrib><creatorcontrib>ENG STEPHEN K</creatorcontrib><creatorcontrib>BORROZ WILLIAM T</creatorcontrib><title>Adjustable test pattern results latency</title><description>A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFB3TMkqLS5JTMpJVShJLS5RKEgsKUktylMoSi0uzSkpVshJLEnNS67kYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBgaWhgYGxgbGjobGxKkCAGcBKSU</recordid><startdate>20090416</startdate><enddate>20090416</enddate><creator>MCGOLDRICK MICHAEL F</creator><creator>MILLEY DAVID A</creator><creator>ENG STEPHEN K</creator><creator>BORROZ WILLIAM T</creator><scope>EVB</scope></search><sort><creationdate>20090416</creationdate><title>Adjustable test pattern results latency</title><author>MCGOLDRICK MICHAEL F ; MILLEY DAVID A ; ENG STEPHEN K ; BORROZ WILLIAM T</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2009100303A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>MCGOLDRICK MICHAEL F</creatorcontrib><creatorcontrib>MILLEY DAVID A</creatorcontrib><creatorcontrib>ENG STEPHEN K</creatorcontrib><creatorcontrib>BORROZ WILLIAM T</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MCGOLDRICK MICHAEL F</au><au>MILLEY DAVID A</au><au>ENG STEPHEN K</au><au>BORROZ WILLIAM T</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Adjustable test pattern results latency</title><date>2009-04-16</date><risdate>2009</risdate><abstract>A digital test instrument and a test method provide adjustable results latency. A digital test instrument includes a pattern controller configured to generate a sequence of test patterns, responsive, at least in part, to a pass/fail result, a pattern memory configured to supply the generated sequence of test patterns to a unit under test, a pattern results collection unit configured to receive at least one result value from the unit under test and to determine a pass/fail result for at least one supplied test pattern, and a synchronization unit configured to provide a no-result indication to the pattern controller during a preset number of pattern cycles following the start of a test, the preset number of pattern cycles based on a results latency of the test instrument, and to provide pass/fail results to the pattern controller after the preset number of pattern cycles.</abstract><oa>free_for_read</oa></addata></record>
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subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title Adjustable test pattern results latency
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T22%3A00%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MCGOLDRICK%20MICHAEL%20F&rft.date=2009-04-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2009100303A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true