System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete

A system and method for finding electromigration (EM), self heat (SH) and voltage drop/droop violations of an integrated circuit, when its design and electrical characterization are not complete, are disclosed. The method includes analyzing polygons for average, root-mean-square (RMS) and Ipeak curr...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GESELEV IRINA, RITTMAN DAN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator GESELEV IRINA
RITTMAN DAN
description A system and method for finding electromigration (EM), self heat (SH) and voltage drop/droop violations of an integrated circuit, when its design and electrical characterization are not complete, are disclosed. The method includes analyzing polygons for average, root-mean-square (RMS) and Ipeak current densities and voltages of a mask layout block and obtaining one or more electromigration, self heat and/or voltage drop/droop rules associated with the polygon from a technology and an external constraints file. The system reads the available design simulation data to calculate the average, RMS and Ipeak current densities and voltages, and estimates the current densities and voltages when no data available. The method also includes topological analysis of the mask layout and analysis of the electrical circuit elements of the design. The method finds the polygons where the current densities are higher than electromigration and self heat rules as taken from technology or external constraints file. The method also finds the polygons where the current densities are higher than in other polygons, by the defined threshold. The method also finds the nodes where the voltage drop/droop is larger than the rule. The method also finds the polygons where the voltage drop/droop is larger than in other polygons by the defined threshold. The method and system work on GDSII, GDSIII format files and on industry standards layout editors' database.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2009031264A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2009031264A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2009031264A13</originalsourceid><addsrcrecordid>eNqNjU1qwzAQhb3JorS5w0C2DdhJKXQZSkv2adZmkJ7sAVljpGlCeqfcsY7bA2T14P1876G6Hi7FMBAnTwOsV09BMwVJXlJHiHCWdZAus4mmZyqIgXqwzZOTRuMO5LOOdBKNc6uQhikmSYbbEJ6cZPctRucek2-FPIp0aYb8nYjjSK7nzM6Q5WcmEWdMGKfDGGF4qhaBY8HyXx-r1efH1_t-jVFblJEdEqw9HjZ1_VZvm83ry67Z3tf6Bc_DW6c</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete</title><source>esp@cenet</source><creator>GESELEV IRINA ; RITTMAN DAN</creator><creatorcontrib>GESELEV IRINA ; RITTMAN DAN</creatorcontrib><description>A system and method for finding electromigration (EM), self heat (SH) and voltage drop/droop violations of an integrated circuit, when its design and electrical characterization are not complete, are disclosed. The method includes analyzing polygons for average, root-mean-square (RMS) and Ipeak current densities and voltages of a mask layout block and obtaining one or more electromigration, self heat and/or voltage drop/droop rules associated with the polygon from a technology and an external constraints file. The system reads the available design simulation data to calculate the average, RMS and Ipeak current densities and voltages, and estimates the current densities and voltages when no data available. The method also includes topological analysis of the mask layout and analysis of the electrical circuit elements of the design. The method finds the polygons where the current densities are higher than electromigration and self heat rules as taken from technology or external constraints file. The method also finds the polygons where the current densities are higher than in other polygons, by the defined threshold. The method also finds the nodes where the voltage drop/droop is larger than the rule. The method also finds the polygons where the voltage drop/droop is larger than in other polygons by the defined threshold. The method and system work on GDSII, GDSIII format files and on industry standards layout editors' database.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090129&amp;DB=EPODOC&amp;CC=US&amp;NR=2009031264A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090129&amp;DB=EPODOC&amp;CC=US&amp;NR=2009031264A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GESELEV IRINA</creatorcontrib><creatorcontrib>RITTMAN DAN</creatorcontrib><title>System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete</title><description>A system and method for finding electromigration (EM), self heat (SH) and voltage drop/droop violations of an integrated circuit, when its design and electrical characterization are not complete, are disclosed. The method includes analyzing polygons for average, root-mean-square (RMS) and Ipeak current densities and voltages of a mask layout block and obtaining one or more electromigration, self heat and/or voltage drop/droop rules associated with the polygon from a technology and an external constraints file. The system reads the available design simulation data to calculate the average, RMS and Ipeak current densities and voltages, and estimates the current densities and voltages when no data available. The method also includes topological analysis of the mask layout and analysis of the electrical circuit elements of the design. The method finds the polygons where the current densities are higher than electromigration and self heat rules as taken from technology or external constraints file. The method also finds the polygons where the current densities are higher than in other polygons, by the defined threshold. The method also finds the nodes where the voltage drop/droop is larger than the rule. The method also finds the polygons where the voltage drop/droop is larger than in other polygons by the defined threshold. The method and system work on GDSII, GDSIII format files and on industry standards layout editors' database.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjU1qwzAQhb3JorS5w0C2DdhJKXQZSkv2adZmkJ7sAVljpGlCeqfcsY7bA2T14P1876G6Hi7FMBAnTwOsV09BMwVJXlJHiHCWdZAus4mmZyqIgXqwzZOTRuMO5LOOdBKNc6uQhikmSYbbEJ6cZPctRucek2-FPIp0aYb8nYjjSK7nzM6Q5WcmEWdMGKfDGGF4qhaBY8HyXx-r1efH1_t-jVFblJEdEqw9HjZ1_VZvm83ry67Z3tf6Bc_DW6c</recordid><startdate>20090129</startdate><enddate>20090129</enddate><creator>GESELEV IRINA</creator><creator>RITTMAN DAN</creator><scope>EVB</scope></search><sort><creationdate>20090129</creationdate><title>System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete</title><author>GESELEV IRINA ; RITTMAN DAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2009031264A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>GESELEV IRINA</creatorcontrib><creatorcontrib>RITTMAN DAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GESELEV IRINA</au><au>RITTMAN DAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete</title><date>2009-01-29</date><risdate>2009</risdate><abstract>A system and method for finding electromigration (EM), self heat (SH) and voltage drop/droop violations of an integrated circuit, when its design and electrical characterization are not complete, are disclosed. The method includes analyzing polygons for average, root-mean-square (RMS) and Ipeak current densities and voltages of a mask layout block and obtaining one or more electromigration, self heat and/or voltage drop/droop rules associated with the polygon from a technology and an external constraints file. The system reads the available design simulation data to calculate the average, RMS and Ipeak current densities and voltages, and estimates the current densities and voltages when no data available. The method also includes topological analysis of the mask layout and analysis of the electrical circuit elements of the design. The method finds the polygons where the current densities are higher than electromigration and self heat rules as taken from technology or external constraints file. The method also finds the polygons where the current densities are higher than in other polygons, by the defined threshold. The method also finds the nodes where the voltage drop/droop is larger than the rule. The method also finds the polygons where the voltage drop/droop is larger than in other polygons by the defined threshold. The method and system work on GDSII, GDSIII format files and on industry standards layout editors' database.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2009031264A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title System and method for finding electromigration, self heat and voltage drop violations of an integrated circuit when its design and electrical characterization are incomplete
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T11%3A46%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GESELEV%20IRINA&rft.date=2009-01-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2009031264A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true