Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus

A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facilit...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: LECOCQ PAUL FRANK, AL-OMARI RA'ED MOHAMMAD, FLOYD MICHAEL STEPHEN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator LECOCQ PAUL FRANK
AL-OMARI RA'ED MOHAMMAD
FLOYD MICHAEL STEPHEN
description A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2009007076A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2009007076A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2009007076A13</originalsourceid><addsrcrecordid>eNrjZIgOrsxLzijKz8usysxLVwgpykxPTy0CMfPTFHxLc0oyC3JSFTwSi1LKE4tSgfKJyakKbonJmTmZJZmpxQqhxSC1iXkKrhWZxSUgdnBlcUlqroJTaTEPA2taYk5xKi-U5mZQdnMNcfbQTS3Ij08tLgAalZdaEh8abGRgYGlgYG5gbuZoaEycKgBUdzwl</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus</title><source>esp@cenet</source><creator>LECOCQ PAUL FRANK ; AL-OMARI RA'ED MOHAMMAD ; FLOYD MICHAEL STEPHEN</creator><creatorcontrib>LECOCQ PAUL FRANK ; AL-OMARI RA'ED MOHAMMAD ; FLOYD MICHAEL STEPHEN</creatorcontrib><description>A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2009</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090101&amp;DB=EPODOC&amp;CC=US&amp;NR=2009007076A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20090101&amp;DB=EPODOC&amp;CC=US&amp;NR=2009007076A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LECOCQ PAUL FRANK</creatorcontrib><creatorcontrib>AL-OMARI RA'ED MOHAMMAD</creatorcontrib><creatorcontrib>FLOYD MICHAEL STEPHEN</creatorcontrib><title>Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus</title><description>A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZIgOrsxLzijKz8usysxLVwgpykxPTy0CMfPTFHxLc0oyC3JSFTwSi1LKE4tSgfKJyakKbonJmTmZJZmpxQqhxSC1iXkKrhWZxSUgdnBlcUlqroJTaTEPA2taYk5xKi-U5mZQdnMNcfbQTS3Ij08tLgAalZdaEh8abGRgYGlgYG5gbuZoaEycKgBUdzwl</recordid><startdate>20090101</startdate><enddate>20090101</enddate><creator>LECOCQ PAUL FRANK</creator><creator>AL-OMARI RA'ED MOHAMMAD</creator><creator>FLOYD MICHAEL STEPHEN</creator><scope>EVB</scope></search><sort><creationdate>20090101</creationdate><title>Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus</title><author>LECOCQ PAUL FRANK ; AL-OMARI RA'ED MOHAMMAD ; FLOYD MICHAEL STEPHEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2009007076A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2009</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LECOCQ PAUL FRANK</creatorcontrib><creatorcontrib>AL-OMARI RA'ED MOHAMMAD</creatorcontrib><creatorcontrib>FLOYD MICHAEL STEPHEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LECOCQ PAUL FRANK</au><au>AL-OMARI RA'ED MOHAMMAD</au><au>FLOYD MICHAEL STEPHEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus</title><date>2009-01-01</date><risdate>2009</risdate><abstract>A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2009007076A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Synchronizing Triggering of Multiple Hardware Trace Facilities Using an Existing System Bus
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T07%3A37%3A57IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LECOCQ%20PAUL%20FRANK&rft.date=2009-01-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2009007076A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true