Source Program Analysis Device And Method

Source Program Analysis Device And Method

There is provided an analyzing apparatus for finding the possibility of dividing up and executing a source program using debugging information generated when compiling the source program and memory access information generated by running object code on a simulator. The analyzing apparatus includes:...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SHIMOGORI SHINTARO
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SHIMOGORI SHINTARO
description There is provided an analyzing apparatus for finding the possibility of dividing up and executing a source program using debugging information generated when compiling the source program and memory access information generated by running object code on a simulator. The analyzing apparatus includes: a memory that stores block IDs for grouping some out of the source statements in the source program as processing blocks associated with code memory addresses of respective instructions, based on the debugging information; and a graphical display functional unit that graphically displays, on a display device, based on the memory access information and together with cycle times, an access state for execution memory when the source program is performed, the access state including code memory addresses, variable memory addresses, and access types and being displayed using a different style for each block ID associated with the code memory addresses of the respective instructions.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2008288923A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2008288923A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2008288923A13</originalsourceid><addsrcrecordid>eNrjZNAMzi8tSk5VCCjKTy9KzFVwzEvMqSzOLFZwSS3LBIo75qUo-KaWZOSn8DCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSS-NBgIwMDCyMLC0sjY0dDY-JUAQBhdikJ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Source Program Analysis Device And Method</title><source>esp@cenet</source><creator>SHIMOGORI SHINTARO</creator><creatorcontrib>SHIMOGORI SHINTARO</creatorcontrib><description>There is provided an analyzing apparatus for finding the possibility of dividing up and executing a source program using debugging information generated when compiling the source program and memory access information generated by running object code on a simulator. The analyzing apparatus includes: a memory that stores block IDs for grouping some out of the source statements in the source program as processing blocks associated with code memory addresses of respective instructions, based on the debugging information; and a graphical display functional unit that graphically displays, on a display device, based on the memory access information and together with cycle times, an access state for execution memory when the source program is performed, the access state including code memory addresses, variable memory addresses, and access types and being displayed using a different style for each block ID associated with the code memory addresses of the respective instructions.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20081120&amp;DB=EPODOC&amp;CC=US&amp;NR=2008288923A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20081120&amp;DB=EPODOC&amp;CC=US&amp;NR=2008288923A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIMOGORI SHINTARO</creatorcontrib><title>Source Program Analysis Device And Method</title><description>There is provided an analyzing apparatus for finding the possibility of dividing up and executing a source program using debugging information generated when compiling the source program and memory access information generated by running object code on a simulator. The analyzing apparatus includes: a memory that stores block IDs for grouping some out of the source statements in the source program as processing blocks associated with code memory addresses of respective instructions, based on the debugging information; and a graphical display functional unit that graphically displays, on a display device, based on the memory access information and together with cycle times, an access state for execution memory when the source program is performed, the access state including code memory addresses, variable memory addresses, and access types and being displayed using a different style for each block ID associated with the code memory addresses of the respective instructions.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAMzi8tSk5VCCjKTy9KzFVwzEvMqSzOLFZwSS3LBIo75qUo-KaWZOSn8DCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSS-NBgIwMDCyMLC0sjY0dDY-JUAQBhdikJ</recordid><startdate>20081120</startdate><enddate>20081120</enddate><creator>SHIMOGORI SHINTARO</creator><scope>EVB</scope></search><sort><creationdate>20081120</creationdate><title>Source Program Analysis Device And Method</title><author>SHIMOGORI SHINTARO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2008288923A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIMOGORI SHINTARO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIMOGORI SHINTARO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Source Program Analysis Device And Method</title><date>2008-11-20</date><risdate>2008</risdate><abstract>There is provided an analyzing apparatus for finding the possibility of dividing up and executing a source program using debugging information generated when compiling the source program and memory access information generated by running object code on a simulator. The analyzing apparatus includes: a memory that stores block IDs for grouping some out of the source statements in the source program as processing blocks associated with code memory addresses of respective instructions, based on the debugging information; and a graphical display functional unit that graphically displays, on a display device, based on the memory access information and together with cycle times, an access state for execution memory when the source program is performed, the access state including code memory addresses, variable memory addresses, and access types and being displayed using a different style for each block ID associated with the code memory addresses of the respective instructions.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2008288923A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Source Program Analysis Device And Method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-24T14%3A03%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SHIMOGORI%20SHINTARO&rft.date=2008-11-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2008288923A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true