METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES WITH REDUCED SUSCEPTIBILITY TO LATCH-UP AND SEMICONDUCTOR DEVICE STRUCTURES FORMED BY THE METHODS

Semiconductor methods and device structures for suppressing latch-up in bulk CMOS devices. The method comprises forming a trench in the semiconductor material of the substrate with first sidewalls disposed between a pair of doped wells, also defined in the semiconductor material of the substrate. Th...

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Hauptverfasser:	HAKEY MARK CHARLES, HORAK DAVID VACLAV, KONTOS JIMMY KONSTANTINOS, FURUKAWA TOSHIHARU, CANNON ETHAN HARRISON, MANDELMAN JACK ALLAN, TONTI WILLIAM ROBERT, KOBURGER CHARLES WILLIAM
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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