AUTOMATIC RECONFIGURATION OF AN I/O BUS TO CORRECT FOR AN ERROR BIT

A test pattern is loaded into a driver data shift register and sent from a driver chip to a receive chip over an M bit bus ( 0 to M-1). The test pattern is also generated at the receiver chip and used to compare to the actual received data. Failed compares are stored as logic ones in a bit error reg...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LIKOVICH ROBERT B, REESE ROBERT J, BARKER KENNETH J, MENDENHALL JOSEPH D
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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