Semiconductor Scheme for Reduced Circuit Area in a Simplified Process

An apparatus and method are disclosed for an improved semiconductor interconnect scheme using a simplified process. In an embodiment of the apparatus, a polysilicon shape is formed on a silicon area. The polysilicon shape is created having a bridging vertex. When a spacer is created on the polysilic...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	DONZE RICHARD L, KUEPER TERRANCE W, HOVIS WILLIAM P, SHEETS JOHN E.II, CHRISTENSEN TODD A
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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