Detecting and resolving locks in a memory unit

In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	HILY SEBASTIEN, STRONG BEEMAN, MARDEN MORRIS, MERTEN MATTHEW, MATH PRAKASH, BURNS DAVID
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	HILY SEBASTIEN STRONG BEEMAN MARDEN MORRIS MERTEN MATTHEW MATH PRAKASH BURNS DAVID
description	In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2008059723A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2008059723A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2008059723A13</originalsourceid><addsrcrecordid>eNrjZNBzSS1JTS7JzEtXSMxLUShKLc7PKQPxcvKTs4sVMvMUEhVyU3PziyoVSvMyS3gYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBgYWBqaW5kbGjoTFxqgCI6ytB</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Detecting and resolving locks in a memory unit</title><source>esp@cenet</source><creator>HILY SEBASTIEN ; STRONG BEEMAN ; MARDEN MORRIS ; MERTEN MATTHEW ; MATH PRAKASH ; BURNS DAVID</creator><creatorcontrib>HILY SEBASTIEN ; STRONG BEEMAN ; MARDEN MORRIS ; MERTEN MATTHEW ; MATH PRAKASH ; BURNS DAVID</creatorcontrib><description>In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2008</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080306&DB=EPODOC&CC=US&NR=2008059723A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080306&DB=EPODOC&CC=US&NR=2008059723A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HILY SEBASTIEN</creatorcontrib><creatorcontrib>STRONG BEEMAN</creatorcontrib><creatorcontrib>MARDEN MORRIS</creatorcontrib><creatorcontrib>MERTEN MATTHEW</creatorcontrib><creatorcontrib>MATH PRAKASH</creatorcontrib><creatorcontrib>BURNS DAVID</creatorcontrib><title>Detecting and resolving locks in a memory unit</title><description>In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2008</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNBzSS1JTS7JzEtXSMxLUShKLc7PKQPxcvKTs4sVMvMUEhVyU3PziyoVSvMyS3gYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBgYWBqaW5kbGjoTFxqgCI6ytB</recordid><startdate>20080306</startdate><enddate>20080306</enddate><creator>HILY SEBASTIEN</creator><creator>STRONG BEEMAN</creator><creator>MARDEN MORRIS</creator><creator>MERTEN MATTHEW</creator><creator>MATH PRAKASH</creator><creator>BURNS DAVID</creator><scope>EVB</scope></search><sort><creationdate>20080306</creationdate><title>Detecting and resolving locks in a memory unit</title><author>HILY SEBASTIEN ; STRONG BEEMAN ; MARDEN MORRIS ; MERTEN MATTHEW ; MATH PRAKASH ; BURNS DAVID</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2008059723A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2008</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>HILY SEBASTIEN</creatorcontrib><creatorcontrib>STRONG BEEMAN</creatorcontrib><creatorcontrib>MARDEN MORRIS</creatorcontrib><creatorcontrib>MERTEN MATTHEW</creatorcontrib><creatorcontrib>MATH PRAKASH</creatorcontrib><creatorcontrib>BURNS DAVID</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HILY SEBASTIEN</au><au>STRONG BEEMAN</au><au>MARDEN MORRIS</au><au>MERTEN MATTHEW</au><au>MATH PRAKASH</au><au>BURNS DAVID</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Detecting and resolving locks in a memory unit</title><date>2008-03-06</date><risdate>2008</risdate><abstract>In one embodiment, the present invention includes an apparatus having a first counter to count dispatches of a senior request in a memory unit, a second counter to count cycles of a processor coupled to the memory unit, and a controller coupled to the first and second counters to execute one or more one remediation measures with respect to the senior request based on a value of at least one of the counters. Other embodiments are described and claimed.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US2008059723A1
source	esp@cenet
subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	Detecting and resolving locks in a memory unit
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-16T15%3A38%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HILY%20SEBASTIEN&rft.date=2008-03-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2008059723A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true