Multi-Level Memory for Micro-Fluid Ejection Heads

Circuits for use with micro-fluid ejection devices, such as those having a memory array with floating gate transistors With one such memory array, a charge is stored on the gate of at least one transistor, and a current conducted by the transistor is affected by an amount of the charge stored on a g...

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Bibliographische Detailangaben

Hauptverfasser:	EDELEN JOHN G, FUGATE EARL L
Format:	Patent
Sprache:	eng
Schlagworte:	CORRECTION OF TYPOGRAPHICAL ERRORS i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME LINING MACHINES PERFORMING OPERATIONS PRINTING SELECTIVE PRINTING MECHANISMS STAMPS TRANSPORTING TYPEWRITERS
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