Multi-Level Memory for Micro-Fluid Ejection Heads

Circuits for use with micro-fluid ejection devices, such as those having a memory array with floating gate transistors With one such memory array, a charge is stored on the gate of at least one transistor, and a current conducted by the transistor is affected by an amount of the charge stored on a g...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	EDELEN JOHN G, FUGATE EARL L
Format:	Patent
Sprache:	eng
Schlagworte:	CORRECTION OF TYPOGRAPHICAL ERRORS i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME LINING MACHINES PERFORMING OPERATIONS PRINTING SELECTIVE PRINTING MECHANISMS STAMPS TRANSPORTING TYPEWRITERS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	Circuits for use with micro-fluid ejection devices, such as those having a memory array with floating gate transistors With one such memory array, a charge is stored on the gate of at least one transistor, and a current conducted by the transistor is affected by an amount of the charge stored on a gate of the transistor. A signal sensor resolves a current conducted by one of the transistors into one of more than two discrete states. One such signal sensor may be an analog-to-digital converter implemented by a neural network, and one such memory array may be part of a printhead.