Reducing data hazards in pipelined processors to provide high processor utilization

A pipelined computer processor is presented that reduces data hazards such that high processor utilization is attained. The processor restructures a set of instructions to operate concurrently on multiple pieces of data in multiple passes. One subset of instructions operates on one piece of data whi...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: PETERSON JAMES, WOOTTON ALAN T, CROOK NEAL A
Format: Patent
Sprache:eng
Schlagworte:
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