Programmable sync pulse generator
A programmable sync pulse generator and sync pulse generation method are operable in a clock synchronizer to effectuate data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock...
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creator | AKKERMAN RYAN L ADKISSON RICHARD W |
description | A programmable sync pulse generator and sync pulse generation method are operable in a clock synchronizer to effectuate data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A phase detection circuitry is operable to sample the first clock signal with the second clock signal to determine coincident edges of the first and second clock signals. Validation circuitry is operable to validate the coincident edges based upon skew tolerance between the first and second clock signals and to generate a valid edge signal responsive thereto. Sync generation circuitry, responsive to the valid edge signal, is operable to generate synchronization pulses in the first clock domain and synchronization pulses in the second clock domain. |
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The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A phase detection circuitry is operable to sample the first clock signal with the second clock signal to determine coincident edges of the first and second clock signals. Validation circuitry is operable to validate the coincident edges based upon skew tolerance between the first and second clock signals and to generate a valid edge signal responsive thereto. Sync generation circuitry, responsive to the valid edge signal, is operable to generate synchronization pulses in the first clock domain and synchronization pulses in the second clock domain.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2006</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060126&DB=EPODOC&CC=US&NR=2006018416A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20060126&DB=EPODOC&CC=US&NR=2006018416A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AKKERMAN RYAN L</creatorcontrib><creatorcontrib>ADKISSON RICHARD W</creatorcontrib><title>Programmable sync pulse generator</title><description>A programmable sync pulse generator and sync pulse generation method are operable in a clock synchronizer to effectuate data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A phase detection circuitry is operable to sample the first clock signal with the second clock signal to determine coincident edges of the first and second clock signals. Validation circuitry is operable to validate the coincident edges based upon skew tolerance between the first and second clock signals and to generate a valid edge signal responsive thereto. Sync generation circuitry, responsive to the valid edge signal, is operable to generate synchronization pulses in the first clock domain and synchronization pulses in the second clock domain.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2006</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAMKMpPL0rMzU1MyklVKK7MS1YoKM0pTlVIT81LLUosyS_iYWBNSwSK8EJpbgZlN9cQZw_d1IL8-NTigsRkoMqS-NBgIwMDMwNDCxNDM0dDY-JUAQA5Yyba</recordid><startdate>20060126</startdate><enddate>20060126</enddate><creator>AKKERMAN RYAN L</creator><creator>ADKISSON RICHARD W</creator><scope>EVB</scope></search><sort><creationdate>20060126</creationdate><title>Programmable sync pulse generator</title><author>AKKERMAN RYAN L ; ADKISSON RICHARD W</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2006018416A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2006</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>AKKERMAN RYAN L</creatorcontrib><creatorcontrib>ADKISSON RICHARD W</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AKKERMAN RYAN L</au><au>ADKISSON RICHARD W</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Programmable sync pulse generator</title><date>2006-01-26</date><risdate>2006</risdate><abstract>A programmable sync pulse generator and sync pulse generation method are operable in a clock synchronizer to effectuate data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A phase detection circuitry is operable to sample the first clock signal with the second clock signal to determine coincident edges of the first and second clock signals. Validation circuitry is operable to validate the coincident edges based upon skew tolerance between the first and second clock signals and to generate a valid edge signal responsive thereto. Sync generation circuitry, responsive to the valid edge signal, is operable to generate synchronization pulses in the first clock domain and synchronization pulses in the second clock domain.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Programmable sync pulse generator |
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