Trellis-based detection process and system
A method for detecting signals affected by intersymbol interference provides for a path memory being arranged in the form of a trellis admitting survivor paths comprising a first and a second stage. The first stage includes a shift register exchange with a given number of states and a given length l...
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creator | FITZPATRICK KELLY K MCEWEN JOHN J DATI ANGELO IACAZIO EZIO MCEWEN PETER ZAFER BAHJAT SAVO PIERANDREA |
description | A method for detecting signals affected by intersymbol interference provides for a path memory being arranged in the form of a trellis admitting survivor paths comprising a first and a second stage. The first stage includes a shift register exchange with a given number of states and a given length lambda. At time k-lambda, where lambda is said given length, the first stage outputs a) a first state SAkk-lambda on the survivor path for the best state Ak at time k, while keeping track of the parity for the state at time k-lambda for each of the survivor paths in said path memory, and b) a second state SBkk-lambda on the survivor path for another state Bk having the same intersymbol interference state as said best state Ak and the opposite priority state. The second stage as is a two-state shift register exchange having a respective memory length Lambda, including respective first and second registers. In said respective first and second registers the survivor paths are stored leading to a respective first sigma0k and second (sigma1k state, the first respective state being equal to said first state SAkk-lambda on said best path, whereby the respective first register contains the backend of said best survivor path, while the respective second register contains the backend of an alternative survivor path, the alternative survivor path being for the state at time k with the same intersymbol interference state as said best state and the opposite parity state. |
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The first stage includes a shift register exchange with a given number of states and a given length lambda. At time k-lambda, where lambda is said given length, the first stage outputs a) a first state SAkk-lambda on the survivor path for the best state Ak at time k, while keeping track of the parity for the state at time k-lambda for each of the survivor paths in said path memory, and b) a second state SBkk-lambda on the survivor path for another state Bk having the same intersymbol interference state as said best state Ak and the opposite priority state. The second stage as is a two-state shift register exchange having a respective memory length Lambda, including respective first and second registers. In said respective first and second registers the survivor paths are stored leading to a respective first sigma0k and second (sigma1k state, the first respective state being equal to said first state SAkk-lambda on said best path, whereby the respective first register contains the backend of said best survivor path, while the respective second register contains the backend of an alternative survivor path, the alternative survivor path being for the state at time k with the same intersymbol interference state as said best state and the opposite parity state.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CODE CONVERSION IN GENERAL ; CODING ; DECODING ; ELECTRICITY ; INFORMATION STORAGE ; INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER ; PHYSICS</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20051103&DB=EPODOC&CC=US&NR=2005246614A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20051103&DB=EPODOC&CC=US&NR=2005246614A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FITZPATRICK KELLY K</creatorcontrib><creatorcontrib>MCEWEN JOHN J</creatorcontrib><creatorcontrib>DATI ANGELO</creatorcontrib><creatorcontrib>IACAZIO EZIO</creatorcontrib><creatorcontrib>MCEWEN PETER</creatorcontrib><creatorcontrib>ZAFER BAHJAT</creatorcontrib><creatorcontrib>SAVO PIERANDREA</creatorcontrib><title>Trellis-based detection process and system</title><description>A method for detecting signals affected by intersymbol interference provides for a path memory being arranged in the form of a trellis admitting survivor paths comprising a first and a second stage. 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In said respective first and second registers the survivor paths are stored leading to a respective first sigma0k and second (sigma1k state, the first respective state being equal to said first state SAkk-lambda on said best path, whereby the respective first register contains the backend of said best survivor path, while the respective second register contains the backend of an alternative survivor path, the alternative survivor path being for the state at time k with the same intersymbol interference state as said best state and the opposite parity state.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER PHYSICS |
title | Trellis-based detection process and system |
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