Semiconductor device

A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an "Si" interposer and a resin interposer are arranged under the plural s...

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Hauptverfasser: TANIE HISASHI, KATAGIRI MITSUAKI, IKEDA HIROAKI, OHTA HIROYUKI, ANJOH ICHIRO, WATANABE YUJI, HISANO NAE
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creator TANIE HISASHI
KATAGIRI MITSUAKI
IKEDA HIROAKI
OHTA HIROYUKI
ANJOH ICHIRO
WATANABE YUJI
HISANO NAE
description A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an "Si" interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2005189639A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2005189639A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2005189639A13</originalsourceid><addsrcrecordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGBqaGFpZmxpaOhsbEqQIA5Pkh9A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device</title><source>esp@cenet</source><creator>TANIE HISASHI ; KATAGIRI MITSUAKI ; IKEDA HIROAKI ; OHTA HIROYUKI ; ANJOH ICHIRO ; WATANABE YUJI ; HISANO NAE</creator><creatorcontrib>TANIE HISASHI ; KATAGIRI MITSUAKI ; IKEDA HIROAKI ; OHTA HIROYUKI ; ANJOH ICHIRO ; WATANABE YUJI ; HISANO NAE</creatorcontrib><description>A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an "Si" interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050901&amp;DB=EPODOC&amp;CC=US&amp;NR=2005189639A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050901&amp;DB=EPODOC&amp;CC=US&amp;NR=2005189639A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TANIE HISASHI</creatorcontrib><creatorcontrib>KATAGIRI MITSUAKI</creatorcontrib><creatorcontrib>IKEDA HIROAKI</creatorcontrib><creatorcontrib>OHTA HIROYUKI</creatorcontrib><creatorcontrib>ANJOH ICHIRO</creatorcontrib><creatorcontrib>WATANABE YUJI</creatorcontrib><creatorcontrib>HISANO NAE</creatorcontrib><title>Semiconductor device</title><description>A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an "Si" interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGBqaGFpZmxpaOhsbEqQIA5Pkh9A</recordid><startdate>20050901</startdate><enddate>20050901</enddate><creator>TANIE HISASHI</creator><creator>KATAGIRI MITSUAKI</creator><creator>IKEDA HIROAKI</creator><creator>OHTA HIROYUKI</creator><creator>ANJOH ICHIRO</creator><creator>WATANABE YUJI</creator><creator>HISANO NAE</creator><scope>EVB</scope></search><sort><creationdate>20050901</creationdate><title>Semiconductor device</title><author>TANIE HISASHI ; KATAGIRI MITSUAKI ; IKEDA HIROAKI ; OHTA HIROYUKI ; ANJOH ICHIRO ; WATANABE YUJI ; HISANO NAE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2005189639A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>TANIE HISASHI</creatorcontrib><creatorcontrib>KATAGIRI MITSUAKI</creatorcontrib><creatorcontrib>IKEDA HIROAKI</creatorcontrib><creatorcontrib>OHTA HIROYUKI</creatorcontrib><creatorcontrib>ANJOH ICHIRO</creatorcontrib><creatorcontrib>WATANABE YUJI</creatorcontrib><creatorcontrib>HISANO NAE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TANIE HISASHI</au><au>KATAGIRI MITSUAKI</au><au>IKEDA HIROAKI</au><au>OHTA HIROYUKI</au><au>ANJOH ICHIRO</au><au>WATANABE YUJI</au><au>HISANO NAE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device</title><date>2005-09-01</date><risdate>2005</risdate><abstract>A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an "Si" interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor device
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T13%3A11%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TANIE%20HISASHI&rft.date=2005-09-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2005189639A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true