Stress free etch processing in combination with a dynamic liquid meniscus

A system and method for planarizing and controlling non-uniformity on a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple features in the pattern. The conductive i...

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Hauptverfasser: KOROLIK MIKHAIL, RAVKIN MICHAEL, YADAV PUNEET, BAILEY ANDREW D.III
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creator KOROLIK MIKHAIL
RAVKIN MICHAEL
YADAV PUNEET
BAILEY ANDREW D.III
description A system and method for planarizing and controlling non-uniformity on a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple features in the pattern. The conductive interconnect material having an overburden portion. A bulk of the overburden portion is removed and a remaining portion of the overburden portion has a non-uniformity. The non-uniformity is mapped, optimal solution determined and a dynamic liquid meniscus etch process recipe is developed to correct the non-uniformity. A dynamic liquid meniscus etch process, using the dynamic liquid meniscus etch process recipe, is applied to correct the non-uniformity to substantially planarize the remaining portion of the overburden portion.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2005090093A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2005090093A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2005090093A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAQgOEsDqK-w4FzIVocOopYdK7OJV6v7UFzibkU8e118AGcfvj4l-ba5ESq0CcioIwjxBTwKywDsAAG_2BxmYPAi_MIDrq3OM8IEz9n7sCTsOKsa7Po3aS0-XVltvX5droUFENLGh2SUG7vzd7ag62srcrjrvzv-gDEQDW-</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Stress free etch processing in combination with a dynamic liquid meniscus</title><source>esp@cenet</source><creator>KOROLIK MIKHAIL ; RAVKIN MICHAEL ; YADAV PUNEET ; BAILEY ANDREW D.III</creator><creatorcontrib>KOROLIK MIKHAIL ; RAVKIN MICHAEL ; YADAV PUNEET ; BAILEY ANDREW D.III</creatorcontrib><description>A system and method for planarizing and controlling non-uniformity on a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple features in the pattern. The conductive interconnect material having an overburden portion. A bulk of the overburden portion is removed and a remaining portion of the overburden portion has a non-uniformity. The non-uniformity is mapped, optimal solution determined and a dynamic liquid meniscus etch process recipe is developed to correct the non-uniformity. A dynamic liquid meniscus etch process, using the dynamic liquid meniscus etch process recipe, is applied to correct the non-uniformity to substantially planarize the remaining portion of the overburden portion.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050428&amp;DB=EPODOC&amp;CC=US&amp;NR=2005090093A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20050428&amp;DB=EPODOC&amp;CC=US&amp;NR=2005090093A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KOROLIK MIKHAIL</creatorcontrib><creatorcontrib>RAVKIN MICHAEL</creatorcontrib><creatorcontrib>YADAV PUNEET</creatorcontrib><creatorcontrib>BAILEY ANDREW D.III</creatorcontrib><title>Stress free etch processing in combination with a dynamic liquid meniscus</title><description>A system and method for planarizing and controlling non-uniformity on a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple features in the pattern. The conductive interconnect material having an overburden portion. A bulk of the overburden portion is removed and a remaining portion of the overburden portion has a non-uniformity. The non-uniformity is mapped, optimal solution determined and a dynamic liquid meniscus etch process recipe is developed to correct the non-uniformity. A dynamic liquid meniscus etch process, using the dynamic liquid meniscus etch process recipe, is applied to correct the non-uniformity to substantially planarize the remaining portion of the overburden portion.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAQgOEsDqK-w4FzIVocOopYdK7OJV6v7UFzibkU8e118AGcfvj4l-ba5ESq0CcioIwjxBTwKywDsAAG_2BxmYPAi_MIDrq3OM8IEz9n7sCTsOKsa7Po3aS0-XVltvX5droUFENLGh2SUG7vzd7ag62srcrjrvzv-gDEQDW-</recordid><startdate>20050428</startdate><enddate>20050428</enddate><creator>KOROLIK MIKHAIL</creator><creator>RAVKIN MICHAEL</creator><creator>YADAV PUNEET</creator><creator>BAILEY ANDREW D.III</creator><scope>EVB</scope></search><sort><creationdate>20050428</creationdate><title>Stress free etch processing in combination with a dynamic liquid meniscus</title><author>KOROLIK MIKHAIL ; RAVKIN MICHAEL ; YADAV PUNEET ; BAILEY ANDREW D.III</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2005090093A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KOROLIK MIKHAIL</creatorcontrib><creatorcontrib>RAVKIN MICHAEL</creatorcontrib><creatorcontrib>YADAV PUNEET</creatorcontrib><creatorcontrib>BAILEY ANDREW D.III</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KOROLIK MIKHAIL</au><au>RAVKIN MICHAEL</au><au>YADAV PUNEET</au><au>BAILEY ANDREW D.III</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Stress free etch processing in combination with a dynamic liquid meniscus</title><date>2005-04-28</date><risdate>2005</risdate><abstract>A system and method for planarizing and controlling non-uniformity on a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple features in the pattern. The conductive interconnect material having an overburden portion. A bulk of the overburden portion is removed and a remaining portion of the overburden portion has a non-uniformity. The non-uniformity is mapped, optimal solution determined and a dynamic liquid meniscus etch process recipe is developed to correct the non-uniformity. A dynamic liquid meniscus etch process, using the dynamic liquid meniscus etch process recipe, is applied to correct the non-uniformity to substantially planarize the remaining portion of the overburden portion.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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recordid cdi_epo_espacenet_US2005090093A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Stress free etch processing in combination with a dynamic liquid meniscus
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-10T22%3A58%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KOROLIK%20MIKHAIL&rft.date=2005-04-28&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2005090093A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true