Nitrided ultrathin gate dielectrics
A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then sub...
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| creator | QUINLIVAN JAMES J HWANG THOMAS T WARD BETH A D'EMIC CHRISTOPHER P JAMISON PAUL C KHARE MUKESH V |
| description | A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness. |
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In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2005</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20050428&DB=EPODOC&CC=US&NR=2005087822A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20050428&DB=EPODOC&CC=US&NR=2005087822A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>QUINLIVAN JAMES J</creatorcontrib><creatorcontrib>HWANG THOMAS T</creatorcontrib><creatorcontrib>WARD BETH A</creatorcontrib><creatorcontrib>D'EMIC CHRISTOPHER P</creatorcontrib><creatorcontrib>JAMISON PAUL C</creatorcontrib><creatorcontrib>KHARE MUKESH V</creatorcontrib><title>Nitrided ultrathin gate dielectrics</title><description>A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2005</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD2yywpykxJTVEozSkpSizJyMxTSE8sSVVIyUzNSU0GyiUX8zCwpiXmFKfyQmluBmU31xBnD93Ugvz41OKCxOTUvNSS-NBgIwMDUwMLcwsjI0dDY-JUAQCVySec</recordid><startdate>20050428</startdate><enddate>20050428</enddate><creator>QUINLIVAN JAMES J</creator><creator>HWANG THOMAS T</creator><creator>WARD BETH A</creator><creator>D'EMIC CHRISTOPHER P</creator><creator>JAMISON PAUL C</creator><creator>KHARE MUKESH V</creator><scope>EVB</scope></search><sort><creationdate>20050428</creationdate><title>Nitrided ultrathin gate dielectrics</title><author>QUINLIVAN JAMES J ; HWANG THOMAS T ; WARD BETH A ; D'EMIC CHRISTOPHER P ; JAMISON PAUL C ; KHARE MUKESH V</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2005087822A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2005</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>QUINLIVAN JAMES J</creatorcontrib><creatorcontrib>HWANG THOMAS T</creatorcontrib><creatorcontrib>WARD BETH A</creatorcontrib><creatorcontrib>D'EMIC CHRISTOPHER P</creatorcontrib><creatorcontrib>JAMISON PAUL C</creatorcontrib><creatorcontrib>KHARE MUKESH V</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>QUINLIVAN JAMES J</au><au>HWANG THOMAS T</au><au>WARD BETH A</au><au>D'EMIC CHRISTOPHER P</au><au>JAMISON PAUL C</au><au>KHARE MUKESH V</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Nitrided ultrathin gate dielectrics</title><date>2005-04-28</date><risdate>2005</risdate><abstract>A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Nitrided ultrathin gate dielectrics |
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